- Use kunit_kcalloc() to allocate the defaults table so that it will be
freed when the test case ends.
- kfree() the buf and *data buffers on the error paths.
- Use kunit_add_action_or_reset() instead of kunit_add_action() so that
if it fails it will call regmap_exit().
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://msgid.link/r/20240411103724.54063-1-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Constifying "struct snd_soc_ops" moves some data to a read-only section, so
increase overall security.
This structure is also part of scripts/const_structs.checkpatch.
As an example, on a x86_64, with allmodconfig:
Before:
text data bss dec hex filename
6315 3696 0 10011 271b sound/soc/intel/boards/ehl_rt5660.o
After:
text data bss dec hex filename
6379 3648 0 10027 272b sound/soc/intel/boards/ehl_rt5660.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://msgid.link/r/2f0613bf4c6018569cdaac876d0589e49cf38a80.1715622793.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Replace SET_RUNTIME_PM_OPS() with its modern alternative RUNTIME_PM_OPS().
The combined usage of pm_ptr() and RUNTIME_PM_OPS() allows the
compiler to evaluate if the runtime suspend/resume() functions are used
at build time or are simply dead code.
This allows removing the __maybe_unused notation from the runtime
suspend/resume() functions.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://msgid.link/r/20240507173735.3456334-3-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Replace SET_RUNTIME_PM_OPS() with its modern alternative RUNTIME_PM_OPS().
The combined usage of pm_ptr() and RUNTIME_PM_OPS() allows the
compiler to evaluate if the runtime suspend/resume() functions are used
at build time or are simply dead code.
This allows removing the __maybe_unused notation from the runtime
suspend/resume() functions.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://msgid.link/r/20240507173735.3456334-2-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Replace SET_RUNTIME_PM_OPS() with its modern alternative RUNTIME_PM_OPS().
The combined usage of pm_ptr() and RUNTIME_PM_OPS() allows the
compiler to evaluate if the runtime suspend/resume() functions are used
at build time or are simply dead code.
This allows removing the __maybe_unused notation from the runtime
suspend/resume() functions.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://msgid.link/r/20240507173735.3456334-1-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Constifying "struct snd_soc_tplg_ops" moves some data to a read-only
section, so increase overall security.
On a x86_64, with allmodconfig:
Before:
text data bss dec hex filename
44519 2888 48 47455 b95f sound/soc/sof/topology.o
After:
text data bss dec hex filename
44839 2552 48 47439 b94f sound/soc/sof/topology.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://msgid.link/r/2d9f5b75e979eb38b6f3baf85dfa1f0fdb3447ef.1715526069.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Constifying "struct snd_soc_tplg_ops" moves some data to a read-only
section, so increase overall security.
On a x86_64, with allmodconfig:
Before:
text data bss dec hex filename
58844 5282 56 64182 fab6 sound/soc/intel/skylake/skl-topology.o
After:
text data bss dec hex filename
59004 5122 56 64182 fab6 sound/soc/intel/skylake/skl-topology.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://msgid.link/r/48f096b6dc617ecf3ca53211c2a696a4df33b21a.1715526069.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Constifying "struct snd_soc_tplg_ops" moves some data to a read-only
section, so increase overall security.
On a x86_64, with allmodconfig:
Before:
text data bss dec hex filename
19942 832 0 20774 5126 sound/soc/qcom/qdsp6/topology.o
After:
text data bss dec hex filename
20102 652 0 20754 5112 sound/soc/qcom/qdsp6/topology.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://msgid.link/r/a5ae843dd8aaacbc1148aea7a3b1d03f11495872.1715526069.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Constifying "struct snd_soc_tplg_ops" moves some data to a read-only
section, so increase overall security.
On a x86_64, with allmodconfig:
Before:
text data bss dec hex filename
28046 794 0 28840 70a8 sound/soc/intel/avs/topology.o
After:
text data bss dec hex filename
28206 614 0 28820 7094 sound/soc/intel/avs/topology.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://msgid.link/r/01de0157088de0475970c79738284d6c86d702fe.1715526069.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
snd_soc_tplg_component_load() does not modify its "*ops" argument. It
only read some values and stores it in "soc_tplg.ops".
This argument and the ops field in "struct soc_tplg" can be made const.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://msgid.link/r/f2f983e791d7f941a95556bb147f426a345d84d4.1715526069.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
The ACPI NHLT table always had 32-bit DMIC blob even if 16-bit was also
present and taken as a 'rule' which obviously got broken and there is at
least one device on the market which ships with only 16-bit DMIC
configuration blob.
This corner case has never been supported and it is going to need topology
updates for DMIC copier to support multiple formats.
As for the kernel side: if the copier supports multiple formats and the
preferred 32-bit DMIC blob is not found then we will try to get a 16-bit
DMIC configuration and look for a 16-bit copier config.
Fixes: f9209644ae ("ASoC: SOF: ipc4-topology: Correct DAI copier config and NHLT blob request")
Link: https://github.com/thesofproject/linux/issues/4973
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://msgid.link/r/20240516075611.18018-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Correct white-space issues and drop unused
WCD939X_MBHC_IS_SECOND_RAMP_REQUIRED() define. No functional impact.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240523104228.36263-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
All four microphone bias registers have similar layout: enable mask is
exactly the same. Use one define, just like older driver wcd938x is
doing, to make the code a bit simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240523104228.36263-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
There is a define for MIC bias registers enable mask called
WCD938X_MICB_EN_MASK, which is already used to handle all four MIC1-4
biases in wcd938x_mbhc_micb_adjust_voltage().
Use the same define also in wcd938x_mbhc_micb_en_status() for MIC2 to
have unified, simpler approach.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240523104228.36263-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
All MIC1-4 bias registers are the same and the header already defines
register fields for them. Drop unused, duplicated defines for MIC2
bias enable register.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240523104228.36263-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert ak4104 binding to DT schema
Signed-off-by: Xiaxi Shen <shenxiaxi26@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240517051317.466764-1-shenxiaxi26@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This is the initial amplifier driver for rt1320.
--
add class id 1
Signed-off-by: Shuming Fan <shumingf@realtek.com>
v2: add Capture DAI for AEC feedback
v3: add some comments for blind writes/patch_code/calling sdw_slave_read_prop
v4: add comments for different class id
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://msgid.link/r/20240521084625.453554-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
X1E80100 CRD board comes with four speakers arranged as left front+back
and then right front+back. Using default channel mapping causes front
right speaker to play left back stream.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240520-asoc-x1e80100-4-channel-mapping-v4-4-f657159b4aad@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
When constructing packets to DSP, the Audioreach code uses 'struct
audioreach_module_config' to configure parameters like number of
channels, bitrate, sample rate etc, but uses defaults for the channel
mapping.
Rework this code to copy the channel mapping from 'struct
audioreach_module_config', instead of using the default. This requires
all callers to fill that structure: add missing initialization of
channel mapping.
Entire patch makes code more logical and easier to follow:
1. q6apm-dai and q6apm-lpass-dais code which allocates 'struct
audioreach_module_config' initializes it fully, so fills both
the number of channels and the channel mapping.
2. Audioreach code, which uses 'struct audioreach_module_config' when
constructing packets, copies entire contents of passed config, not
only pieces of it.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240520-asoc-x1e80100-4-channel-mapping-v4-3-f657159b4aad@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The set_channel_map() implementation in q6apm-lpass-dais driver was
copying older pre-Audioreach code from q6afe-dai driver, but not really
using it. The code sets active channel mask based on passed channel
mapping, but Audioreach code does not use that mask ever. Audioreach
module configuration does have on the other hand proper channel mapping
field, which should supersed that active channel mask.
Drop the unused active channel mask and implement proper mapping of
channels in q6apm-lpass-dais driver.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240520-asoc-x1e80100-4-channel-mapping-v4-2-f657159b4aad@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
There is no need for implementations of DAI set_channel_map() to modify
contents of passed arrays with actual channel mapping. Additionally,
the caller keeps full ownership of the array.
Constify these pointer arguments so the code will be safer and easier to
read (documenting the caller's ownership).
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240520-asoc-x1e80100-4-channel-mapping-v4-1-f657159b4aad@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Add support for the Everest-semi ES8311 codec.
Everest-semi ES8311 codec is a low-power mono audio codec with I2S audio
interface and I2C control.
Supported features:
* Both master and slave mode. Master clock is optional in slave mode.
* Sample rates from 8KHz to 96KHz.
* Sample formats: S16_LE, S18_3LE, S20_3LE, S24_3LE, S24_LE and S32_LE.
* I2S formats: I2S, LEFT_J, DSP_A, DSP_B.
* BCLK and FSYNC clocks inversion.
* Component suspend/resume.
* ADC, PGA, DAC controls.
* ADC DSP controls: volume, fade (ramp rate), ALC, automute, HPF, EQ.
* DAC DSP controls: volume, fade (ramp rate), DRC, EQ.
* DAPM routes: capture path with input source selection (differential
MIC/DMIC) and AIF channel source selection; playback path with DAC
channel source selection.
Limitations:
* Support only for master clocks with a ratio of ADC (or DAC) clock to
LRCLK equal to 256. This to keep the default ADC and DAC oversampling
and ADC scale settings. Anyway all 8-96KHz sample rates are supported
when the ratio of MCLK to sample rate is 32, 64, 128, 256, 384 or 512
(upper limit due to max MCLK freq of 49.2MHz).
* Coefficients for ADC HPF and ADC/DAC EQ not supported.
* Digital mic supported but not tested.
* S18_3LE, S20_3LE and S24_3LE formats supported but not tested.
Signed-off-by: Matteo Martelli <matteomartelli3@gmail.com>
Link: https://msgid.link/r/20240522164722.954656-3-matteomartelli3@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add DT bindings documentation for the Everest-semi ES8311 codec.
Everest-semi ES8311 codec is a low-power mono audio codec with I2S audio
interface and I2C control.
Signed-off-by: Matteo Martelli <matteomartelli3@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240522164722.954656-2-matteomartelli3@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Currently, when an adapter defines a max_write_len quirk,
the data will be chunked into data sizes equal to the
max_write_len quirk value. But the payload will be increased by
the size of the register address before transmission. The
resulting value always ends up larger than the limit set
by the quirk.
Avoid this error by setting regmap's max_write to the quirk's
max_write_len minus the number of bytes for the register and
padding. This allows the chunking to work correctly for this
limited case without impacting other use-cases.
Signed-off-by: Jim Wylder <jwylder@google.com>
Link: https://msgid.link/r/20240523211437.2839942-1-jwylder@google.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Enable the smbb node explicitly for MSM8x26 Lumia devices. These devices
rely on the smbb driver in order to detect USB state.
It seems that this was accidentally missed in the commit that this
fixes.
Fixes: c9c8179d0c ("ARM: dts: qcom: Disable pm8941 & pm8226 smbb charger by default")
Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240424174206.4220-1-rayyan@ansari.sh
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add subnode usb_con: extcon for SM5502 / SM5504 MUIC, which will be used
for RT5033 charger.
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240424144922.28189-1-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The phones listed below have Richtek RT5033 PMIC and charger.
Add them to the device trees.
- Samsung Galaxy A3/A5/A7 2015
- Samsung Galaxy E5/E7
- Samsung Galaxy Grand Max
Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Link: https://lore.kernel.org/r/20240424143158.24358-1-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
For IDP variant, GPIO 20/21 is used by camera use case and camera
driver is not able acquire these GPIOs as it is acquired by UART5
driver as RTS/CTS pin.
UART5 is designed for debug UART for all the board variants of the
sc7280 chipset and RTS/CTS configuration is not required for debug
uart usecase.
Remove CTS/RTS configuration for UART5 instance and change compatible
string to debug UART.
Remove overwriting compatible property from individual target specific
file as it is not required.
Fixes: 38cd93f413 ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
Link: https://lore.kernel.org/r/20240424075853.11445-1-quic_vdadhani@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Qcom SoCs doesn't support legacy PCI, but only PCIe. So use the correct
node name for the controller instances.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-21-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The PCIe Gen4x2 PHY found in the SM8650 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.
Remove the dummy pcie-1-phy-aux-clk clock and now the pcie1_phy exposes
2 clocks, properly add the pcie1_phy provided clocks to the Global Clock
Controller (GCC) node clocks inputs.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240502-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v5-3-10c650cfeade@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The PCIe Gen4x2 PHY found in the SM8550 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.
Remove the dummy pcie-1-phy-aux-clk clock and now the pcie1_phy exposes
2 clocks, properly add the pcie1_phy provided clocks to the Global Clock
Controller (GCC) node clocks inputs.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240502-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v5-2-10c650cfeade@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The PCIe Gen4x2 PHY found in the SM8450 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.
Now the pcie1_phy exposes 2 clocks, properly add the pcie1_phy provided
clocks to the Global Clock Controller (GCC) node clocks inputs.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240502-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v5-1-10c650cfeade@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The usb-role-switch property doesn't make sense for the USB hosts which
are fixed to the host USB data mode. Delete usb-role-switch property
from these hosts.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-12-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The usb-role-switch property doesn't make sense for the USB hosts which
are fixed to either host or peripheral USB data mode. Delete
usb-role-switch property being present in SoC dtsi.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-11-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The lanes from the USB-C SS port are connected to the combo USB+DP QMP
PHY rather than the SS port of the USB controller. Move the connection
endpoint to the QMP PHY out port.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-10-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-9-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-8-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-7-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-6-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-5-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-4-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-3-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-2-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
