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691,473 commits

Author SHA1 Message Date
Julia Lawall
70591ab96e net: bcmgenet: constify ethtool_ops structures
Check for ethtool_ops structures that are only stored in the ethtool_ops
field of a net_device structure or passed as the second argument to
netdev_set_default_ethtool_ops.  These contexts are declared const, so
ethtool_ops structures that have these properties can be declared as const
also.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct ethtool_ops i@p = { ... };

@ok1@
identifier r.i;
struct net_device e;
position p;
@@
e.ethtool_ops = &i@p;

@ok2@
identifier r.i;
expression e;
position p;
@@
netdev_set_default_ethtool_ops(e, &i@p)

@bad@
position p != {r.p,ok1.p,ok2.p};
identifier r.i;
@@
i@p

@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
 struct ethtool_ops i = { ... };
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-08-31 09:22:30 -07:00
Julia Lawall
1eff7002e3 net: ethernet: et131x: constify ethtool_ops structures
Check for ethtool_ops structures that are only stored in the ethtool_ops
field of a net_device structure or passed as the second argument to
netdev_set_default_ethtool_ops.  These contexts are declared const, so
ethtool_ops structures that have these properties can be declared as const
also.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct ethtool_ops i@p = { ... };

@ok1@
identifier r.i;
struct net_device e;
position p;
@@
e.ethtool_ops = &i@p;

@ok2@
identifier r.i;
expression e;
position p;
@@
netdev_set_default_ethtool_ops(e, &i@p)

@bad@
position p != {r.p,ok1.p,ok2.p};
identifier r.i;
@@
i@p

@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
 struct ethtool_ops i = { ... };
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Mark Einon <mark.einon@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-08-31 09:22:30 -07:00
Alexandre Belloni
1bc40cb1cc rtc: rx6110: remove owner assignment
.owner is already set by the spi core.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
Markus Elfring
e545b984f0 rtc: pic32: Delete owner assignment
The field "owner" is set by core. Thus delete an extra initialisation.

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
Jan Östlund
421a5ba24b rtc: bq32k: Fix handling of oscillator failure flag
While the oscillator failure flag is set, the RTC registers
should be considered invalid. bq32k_rtc_read_time() now
returns an error instead of an invalid time.

The failure flag is cleared the next time the clock is set.

Signed-off-by: Jan Östlund <jao@hms.se>
Signed-off-by: Daniel Romell <daro@hms.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
Jan Östlund
6ed1a51e0b rtc: bq32k: Use correct mask name for 'minutes' register.
The BQ32K_SECONDS_MASK and BQ32K_MINUTES_MASK both has the same
value. This is no functional change.

Signed-off-by: Jan Östlund <jao@hms.se>
Signed-off-by: Daniel Romell <daro@hms.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
LABBE Corentin
84281c2d72 rtc: sysfs: fix a cast removing the const attribute
The char pointer buf_ptr is assigned an address from a const char
pointer buf (parameter of wakealarm_store).
The data pointer by buf_ptr is never modified.
So casting it to a (char *) is useless.

This patch remove this cast, and transform buf_ptr to a const char pointer.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
Alexandre Belloni
bbeb9787d9 Documentation: dt: Intersil isl12057 is not a trivial device
The ISL12057 has a documentation file, remove it from trivial-devices.txt

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:35 +02:00
Alexandre Belloni
e8aa7dcbf0 rtc: isl12057: remove driver
The Intersil isl12057 is now supported by the ds1307 driver.

Acked-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:34 +02:00
Alexandre Belloni
78aaa06d79 rtc: ds1307: add Intersil ISL12057 support
Intersil ISL12057 is a drop-in replacement for DS1337. It can be supported
by the ds1307 driver.

Acked-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:34 +02:00
Alexandre Belloni
50d6c0ea81 rtc: ds1307: fix century bit support
Add an option to properly support the century bit of ds1337 and compatibles
and ds1340.
Because the driver had a bug until now, it is not possible to switch users
to the fixed code directly as RTCs in the field will wrongly have the
century bit set.

Acked-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:34 +02:00
Fabio Estevam
59e5e70c95 rtc: ds1390: Fix the SPI chip select number
The number after the '@' symbol should be the SPI chip select
number associated with the ds1390 and it should match the 'reg'
field.

So change it the address to zero, to make it consistent.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:34 +02:00
Christophe JAILLET
83ab7dad06 rtc: pcf2123: Add missing error code assignment before test
It is likely that checking the result of 'pcf2123_write_reg' is expected
here.
Also fix a small style issue. The '{' at the beginning of the function
is misplaced.

Fixes: 809b453b76 ("rtc: pcf2123: clean up writes to the rtc chip")

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 18:21:34 +02:00
Lin Huang
7fbdfcd687 clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
Add the needed id for the ddr clock.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-08-31 18:19:03 +02:00
Milo Kim
a37b7a5a86 ARM: dts: sun8i: Add PWM controller node in H3
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-31 18:16:59 +02:00
Linus Torvalds
9f834ec18d binfmt_elf: switch to new creds when switching to new mm
We used to delay switching to the new credentials until after we had
mapped the executable (and possible elf interpreter).  That was kind of
odd to begin with, since the new executable will actually then _run_
with the new creds, but whatever.

The bigger problem was that we also want to make sure that we turn off
prof events and tracing before we start mapping the new executable
state.  So while this is a cleanup, it's also a fix for a possible
information leak.

Reported-by: Robert Święcki <robert@swiecki.net>
Tested-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Acked-by: Andy Lutomirski <luto@amacapital.net>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Willy Tarreau <w@1wt.eu>
Cc: Kees Cook <keescook@chromium.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-08-31 09:13:56 -07:00
Ken Wang
33f3480268 drm/amdgpu: add si ip blocks setup v3
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:11:21 -04:00
Ken Wang
a036db18c6 drm/amdgpu: add all the components for si into Makefile/kconfig v3
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:11:20 -04:00
Huang Rui
36b9a952bb drm/amdgpu: introduce pcie port read/write entry
This patch adds pcie port read/write entry, because it will be also
used on si dpm part.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:11:20 -04:00
Ken Wang
62a3755341 drm/amdgpu: add si implementation v10
v5: rebase fixes
v6: add mgcg arrays
v7: rebase fixes
v8: rebase fixes
v9: add get_disabled_bios(), make get_xclk static
v10: fix oland and hainan asic specific handle at si_program_aspm

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:11:19 -04:00
Ken Wang
30d1574fa4 drm/amdgpu: add DMA implementation for si v8
v4: rebase fixes
v5: use the generic nop fill
v6: rebase fixes
v7: rebase fixes
    copy count fixes from Jonathan
    general cleanup
    add fill buffer implementation
v8: adapt write_pte and copy_pte to latest changes

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:51 -04:00
Ken Wang
2cd46ad223 drm/amdgpu: add graphic pipeline implementation for si v8
v5: rebase fixes
v6: rebase fixes
v7: rebase fixes
    fix tile reg offset as noticed by Jonathan
    Drop some debugging remnants
v8: add gfx v6 firmware versions for sysfs dump

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:50 -04:00
Ken Wang
098e4b6a90 drm/amdgpu: atombios change for dce6 to work v3
v3: white space fixes

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:20 -04:00
Ken Wang
e2cdf640cb drm/amdgpu: add display controller implementation for si v10
v4: rebase fixups
v5: more fixes based on dce8 code
v6: squash in dmif offset fix
v7: rebase fixups
v8: rebase fixups, drop some debugging remnants
v9: fix BE build
v10: include Marek's tiling fixes, add support for
     page_flip_target, set MASTER_UDPATE_MODE=0,
     fix cursor

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:19 -04:00
Ken Wang
27ae10641e drm/amdgpu: add interupt handler implementation for si v3
v3: rebase fixups

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:19 -04:00
Ken Wang
df70502eef drm/amdgpu: add graphic memory controller implementation for si v7
v4: rebase fixups
v5: rebase fixups
v5: rebase fixups
v6: rebase fixups for gart size changes
v7: add gmc v6 firmware versions for sysfs dump

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:18 -04:00
Ken Wang
0f27e46258 drm/amdgpu: add si header files v4
v4: drop unused DCE6 macro

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:09:08 -04:00
Shaohua Li
ad5b0f7685 raid5: guarantee enough stripes to avoid reshape hang
If there aren't enough stripes, reshape will hang. We have a check for
this in new reshape, but miss it for reshape resume, hence we could see
hang in reshape resume. This patch forces enough stripes existed if
reshape resumes.

Reviewed-by: NeilBrown <neilb@suse.com>
Signed-off-by: Shaohua Li <shli@fb.com>
2016-08-31 09:05:23 -07:00
Shaohua Li
8e018c21da raid5-cache: fix a deadlock in superblock write
There is a potential deadlock in superblock write. Discard could zero data, so
before discard we must make sure superblock is updated to new log tail.
Updating superblock (either directly call md_update_sb() or depend on md
thread) must hold reconfig mutex. On the other hand, raid5_quiesce is called
with reconfig_mutex hold. The first step of raid5_quiesce() is waitting for all
IO finish, hence waitting for reclaim thread, while reclaim thread is calling
this function and waitting for reconfig mutex. So there is a deadlock. We
workaround this issue with a trylock. The downside of the solution is we could
miss discard if we can't take reconfig mutex. But this should happen rarely
(mainly in raid array stop), so miss discard shouldn't be a big problem.

Cc: NeilBrown <neilb@suse.com>
Signed-off-by: Shaohua Li <shli@fb.com>
2016-08-31 09:05:18 -07:00
Sinan Kaya
793ae66c7d dmaengine: qcom_hidma: add error reporting for tx_status
The HIDMA driver is capable of error detection. However, the error was
not being passed back to the client when tx_status API is called.

Changing the error handling behavior to follow this oder.

1. dmaengine asserts error interrupt
2. Driver receives and mark's the txn as error
3. Driver completes the txn and intimates the client. No further
   submissions. Drop the locks before calling callback, as subsequent
   processing by client maybe in callback thread.
4. Client invokes status and you can return error
5. On error, client calls terminate_all. You can reset channel, free all
   descriptors in the active, pending and completed lists
6. Client prepares new txn and so on.

As part of this work, got rid of the reset in the interrupt handler when
an error happens and the HW is put into disabled state. The only way to
recover is for the client to terminate the channel.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31 21:27:32 +05:30
Sinan Kaya
55c370e519 dmaengine: qcom_hidma: report transfer errors with new interface
Pass the DMA errors to the client by passing a result argument. The HW only
supports a generic error when something goes wrong. That's why, using
DMA_TRANS_ABORTED all the time.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31 21:27:32 +05:30
Sinan Kaya
8a31f8b5db dmaengine: qcom_hidma: release the descriptor before the callback
There is a race condition between data transfer callback and descriptor
free code. The callback routine may decide to clear the resources even
though the descriptor has not yet been freed.

Instead of calling the callback first and then releasing the memory,
this code is changing the order to return the descriptor back to the
free pool and then call the user provided callback.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31 21:27:32 +05:30
Tony Lindgren
fdea2d09b9 dmaengine: cppi41: Add basic PM runtime support
Let's keep the device enabled between cppi41_dma_issue_pending()
and dmaengine_desc_get_callback_invoke() and rely on the PM runtime
autoidle timeout elsewhere.

As the PM runtime is for whole device, not for each channel,
we need to queue pending transfers if the device is PM runtime
suspended. Then we start the pending transfers in PM runtime
resume.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31 21:24:24 +05:30
Chao Yu
8913f343cd mbcache: fix to detect failure of register_shrinker
register_shrinker in mb_cache_create may fail due to no memory. This
patch fixes to do the check of return value of register_shrinker and
handle the error case, otherwise mb_cache_create may return with no
error, but losing the inner shrinker.

Signed-off-by: Chao Yu <yuchao0@huawei.com>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
2016-08-31 11:44:36 -04:00
Stephan Mueller
10faa8c0d6 crypto: FIPS - allow tests to be disabled in FIPS mode
In FIPS mode, additional restrictions may apply. If these restrictions
are violated, the kernel will panic(). This patch allows test vectors
for symmetric ciphers to be marked as to be skipped in FIPS mode.

Together with the patch, the XTS test vectors where the AES key is
identical to the tweak key is disabled in FIPS mode. This test vector
violates the FIPS requirement that both keys must be different.

Reported-by: Tapas Sarangi <TSarangi@trustwave.com>
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:21:25 +08:00
Niklas Cassel
610e128374 bindings: PCI: artpec: correct pci binding example
- Increase config size. When using a PCIe switch,
   the previous config size only had room for one device.
 - Add bus range. Inherited optional property.
 - Map downstream I/O to PCI address 0. We can map it to any
   address, but let's be consistent with other drivers.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2016-08-31 10:01:54 -05:00
Maksim Lukoshkov
93ba73fed3 crypto: qat - fix constants table DMA
Copy const_tab array into DMA-able memory (accesible by qat hw).

Signed-off-by: Maksim Lukoshkov <maksim.lukoshkov@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:50 +08:00
PrasannaKumar Muralidharan
98a3c465fe hwrng: tx4939 - Use devm_hwrng_register instead of hwrng_register
By using devm_hwrng_register instead of hwrng_register the .remove
callback in platform_driver can be removed. This reduces a few lines in
code.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:49 +08:00
PrasannaKumar Muralidharan
68734bc9f5 hwrng: Remove check for max less than 4 bytes
HW RNG core never asks for data less than 4 bytes. The check whether max
is less than 4 bytes is unnecessary. Remove the check.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:49 +08:00
Herbert Xu
27c4d548af crypto: xor - Fix warning when XOR_SELECT_TEMPLATE is unset
This patch fixes an unused label warning triggered when the macro
XOR_SELECT_TEMPLATE is not set.

Fixes: 39457acda9 ("crypto: xor - skip speed test if the xor...")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:48 +08:00
Corentin LABBE
85962d2248 hwrng: amd - Convert to new hwrng read() API
This patch convert the hwrng interface used by amd768-rng to its new API
by replacing data_read()/data_present() by read().

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:47 +08:00
Corentin LABBE
3c343a3764 hwrng: amd - Access hardware via ioread32/iowrite32
Instead of accessing hw directly via pmbase, it's better to
access after ioport_map() via ioread32/iowrite32.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:46 +08:00
Corentin LABBE
7bad2cc062 hwrng: amd - Replace global variable with private struct
Instead of having two global variable, it's better to use a
private struct. This will permit to remove amd_pdev variable

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:45 +08:00
Corentin LABBE
fdec60d683 hwrng: amd - release_region must be called after hwrng_unregister
The driver release the memory region before being sure that nobody use
it.

This patch made hwrng_unregister ran before any release was done.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:45 +08:00
Corentin LABBE
055ae89038 hwrng: amd - Remove asm/io.h
checkpatch complains about <asm/io.h> used instead of linux/io.h.
In fact it is not needed.
This patch remove it, and in the process, alphabetize the other headers.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:44 +08:00
Corentin LABBE
f8169bfb49 hwrng: amd - Be consitent with the driver name
The driver name is displayed each time differently.
This patch make use of the same name everywhere.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:43 +08:00
Corentin LABBE
1c335d4487 hwrng: amd - use the BIT macro
This patch add usage of the BIT() macro

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:43 +08:00
Corentin LABBE
6020721320 hwrng: amd - Fix style problem with blank line
Some blank line are unncessary, and one is missing after declaration.
This patch fix thoses style problems.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:42 +08:00
Baoyou Xie
1ac6b731b8 crypto: caam - add missing header dependencies
We get 1 warning when biuld kernel with W=1:
drivers/crypto/caam/ctrl.c:398:5: warning: no previous prototype for 'caam_get_era' [-Wmissing-prototypes]

In fact, this function is declared in drivers/crypto/caam/ctrl.h,
so this patch add missing header dependencies.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:41 +08:00
Omer Khaliq
cc2f1908c6 hwrng: cavium - Add Cavium HWRNG driver for ThunderX SoC.
The Cavium ThunderX SoC has a hardware random number generator.
This driver provides support using the HWRNG framework.

Signed-off-by: Omer Khaliq <okhaliq@caviumnetworks.com>
Signed-off-by: Ananth Jasty <Ananth.Jasty@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2016-08-31 23:00:40 +08:00