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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
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1,428,863 commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Stephen Boyd
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522a83abc3 |
Merge branches 'clk-tenstorrent', 'clk-rockchip', 'clk-imx' and 'clk-allwinner' into clk-next
* clk-tenstorrent: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu * clk-rockchip: clk: rockchip: rk3568: Add PCIe pipe clock gates clk: rockchip: Add clock controller for the RV1103B dt-bindings: clock: rockchip: Add RV1103B CRU support * clk-imx: clk: imx8mq: Correct the CSI PHY sels clk: vf610: Add support for the Ethernet switch clocks dt-bindings: clock: vf610: Add definitions for MTIP L2 switch dt-bindings: clock: vf610: Drop VF610_CLK_END define clk: vf610: Move VF610_CLK_END define to clk-vf610 driver clk: imx: imx8-acm: fix flags for acm clocks clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels() clk: imx: imx6q: Fix device node reference leak in pll6_bypassed() clk: imx: fracn-gppll: Add 477.4MHz support clk: imx: fracn-gppll: Add 333.333333 MHz support clk: imx: pll14xx: Use unsigned format specifier dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad * clk-allwinner: clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock |
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Stephen Boyd
|
699646e684 |
Merge branches 'clk-fixes', 'clk-renesas', 'clk-rpi', 'clk-eswin' and 'clk-mediatek' into clk-next
- ESWIN eic700 SoC clk support
- Econet EN751221 SoC clock/reset support
* clk-fixes:
clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
clk: microchip: mpfs-ccc: fix out of bounds access during output registration
clk: qcom: dispcc-sm8450: use RCG2 ops for DPTX1 AUX clock source
* clk-renesas:
clk: renesas: Add support for RZ/G3L SoC
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
clk: renesas: rzg2l: Re-enable critical module clocks during resume
clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
clk: renesas: rzg2l: Add helper for mod clock enable/disable
clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
clk: renesas: rzg2l: Add support for critical resets
clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
clk: renesas: r9a06g032: Enable watchdog reset sources
clk: renesas: cpg-mssr: Use struct_size() helper
clk: renesas: r9a09g047: Add PCIe clocks and reset
clk: renesas: r9a09g057: Add PCIe clocks and reset
clk: renesas: r9a09g056: Add PCIe clocks and reset
clk: renesas: r9a09g047: Add entries for the RSPIs
clk: renesas: r9a09g056: Add clock and reset entries for RTC
clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
clk: renesas: r9a09g056: Fix ordering of module clocks array
clk: renesas: r9a09g057: Fix ordering of module clocks array
* clk-rpi:
clk: bcm: rpi: Manage clock rate in prepare/unprepare callbacks
* clk-eswin:
MAINTAINERS: Add entry for ESWIN EIC7700 clock driver
clk: eswin: Add eic7700 clock driver
clk: divider: Add devm_clk_hw_register_divider_parent_data
dt-bindings: clock: eswin: Documentation for eic7700 SoC
* clk-mediatek:
clk: airoha: Add econet EN751221 clock/reset support to en7523-scu
dt-bindings: clock, reset: Add econet EN751221
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Stephen Boyd
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887f655eab |
Allwinner clk changes for 7.1
Just one change for this cycle, implementing support for the r-spi module clock in the A523 PRCM block, which was somehow missing during the initial bring-up. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmnSbpkQHHdlbnNAa2Vy bmVsLm9yZwAKCRA4mlQhnA8kMPw7D/9hSQ6ivVksNFqWpEQtLdUR6Ynx85Lo+DYW cW1txhkOpUx3m4LB9H2b3ymCw3urlNMy7Noo7xjm8mrA6pFIL4vcjs17jauz0GLe meRKFYNn/v4QpUkSIijMW+42nWEq3/eFZYbBTN/VPE46ueC5xDWbHSiHlRly7POd eW1jawFHgoAaSmiUkGu0qPuhw7m9FMBAATMuJC0RSl4vh2sDimS9Y7gVYrA2P4Qc M71PFj0s/ATttL5qlXABxpl3idXp7HACkWpnmoZGfNvh74lHTfrHDl5p6v053RGQ xP8sTFUiZvKSEjfjl8WKvn7c7U732AEQEZlS/Vr0QQfIuJTknRqjWQkzcrqJPfHc ZrfCingqq6zPHazDDS2GEb3AnFvnh/xy1uULookGilCuLh84OygJlOnzqFxz2B0P BB0NAa+A6tUxVcgTvmX3Ma6P8QWCSZAvSrPngcRk8uysDsaA026QInfvWpSCVP0W 2xYrTiKq+jF+CxEaMCE/yntKMnIZHIJ2QiB2OAguSkLrDt3LX2JIeniNeKRhb64y zyy1woky4ecWlGt6lKZH6ceiErEY9X+ckwajvvhKRR7j4kzMQ97d9QE39LsvNWFb sn2LnA3SIQGQrCOShRlibbk9xSnCRSJJ90GvtaMQOkSPthnDSZosT13M5TWNixYi zLtmzvCt9w== =mWuN -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna2BUUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSWzcA/+IiMJM0RK/nsW9GiqeF/cZkvkppDz LkJF/mIXj7BewpSLKg6jei2WsKur+bwPTjYm34LRbTwv+NAbJKpH+7/yAMzfHcxZ ushDhxX2in0k1j2W1tAZhD+6PHZgqfM4M/qFPR1Iy/lDafxdI0Fmn7bvg2ODW+TH FujIvsK734wlIqEM7CPp2eIysiq5tB0l3PPep57lm/LO4t7caarQ+nAw5x04iGs9 wf3FCq6g1zNENFba2t34R9ElCoceizE0fXjpVWMsZ4V9eEKnucUzgNLdGY5KPHjJ RW8w0jGKZCUSx0j8rEGFCVVlH+d6RgLeXmDKMp3smFmOu6cbIgvYjt5hP2uNAj7E dINx72hlKEp2Zk9ZYEySNqb3/0r4A3K1PRTMJL5GRFOiwiLsGzSmwqr7jDEBF6X+ uireVfkcGWegcaD5X7f6TrAST+QSO1xSw/LkOU1YInaxgijOb7IMVO13jAHitftJ CQMvwpmFpqdvngWINEosspvmg5oRRqZJhsg0YIMXibV4juQLVHo/ckcTnuV1ps2R 6jdjgtHQ6r6kQ9laQNvpFG723Wf6UxWxTDP6hZRrPCZGpcHKxjthflhbjhL6gfRp O2fML2k97JeeonIaz4qClB/UwJpjujLTxRyLoBnqskcwIZeP++IRcE8ghYKm0tMg B6I0p+dgjgdoYPU= =uZmN -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner Pull Allwinner clk driver updates from Chen-Yu Tsai: Just one change for this cycle, implementing support for the r-spi module clock in the A523 PRCM block, which was somehow missing during the initial bring-up. * tag 'sunxi-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock |
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Stephen Boyd
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cc8f74d301 |
Qualcomm clock fix for v7.0
Fix the clock ops for SM8450 DPTX1 aux clock src to ensure DisplayPort works. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmnFOGUACgkQCx85Pw2Z rcX+CRAAgM2Tif72NDuQJKZMZMAQBH3lADdt21BA6mcBLSff0ibELMncNygNb4d/ pguHQnCpUO1DDmitO6WkNGy8N2sR62YsEwl1MpnrpH4uDu3Vm5hZg338grYm3foP vpfpQTAiou16emle1hnc4uP3o7Wx5aAz1g/PBdJBbG7FzG/vLaUPWSfZku4/lyjE PbPpLGJD3oe7kuX8AcaIH0fGx88s7DxE8m/Xy51qrbXp0UoYYigKd5n/xtksUHsf VtvTaGiYgHR2Mm0J+dfjZEMrVdkp8YUJYdgxyNmQCnmyinsLq/rPCb4VnbMeoQC5 TAs+UHraXUd1yrFPGUF/Lc5mdRpI56uKVLGpg6o+IAwiOLzG0wuU//FPLH6iqcSy wDHnjh6IYg37YZ3/+58MkOyg3DXrsH/KRpgRywlFbDe7km3D2/GlKlSmiMO/JUAC 05XPoDvEaZN1Z3lCXGne7UeBjZRELFBKuPGFliN5mcaQ+K98WC6YqPC6EJL8cvfP rqR3AVeUIvdcjsAbB+ZCbjsikSXNs1iHFnLYSjd3/EPjnqbywq83gqEErCPDQWC/ J0jQHPDNF7opYWO+O4rXC2eEj+wy6cKVyNVDv9hLZVFXGXsLN/oVH3bavb0pFp5z dpkbLljq1djVV/Xz9VbQXjcGv1btMZt4LD9b9ALPPiqH2QAFkjo= =Vq7a -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna18wUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSWQbA//ZDoBbTGdP+jRbJctlz7DW0Mg23If PbndADpiyEjtAKvtJ33huV015p9WIEkeLay7iCpcR0jGRilqz33f3epBXEjVlHUn ZC+VegRtkGP+JpcrEf74DdKNU3ovqwbcPwZka/7TQyb8tIpiaBC/Z6y8k09kdZ1N HPbe7jDmdv55ZTnmpT6zSs6fZTcIzcEbYyfStSVWyP8L4yy62Xdqga5TZepZglfa oTF+y1MNZTzhZjMX6s9FCT01q8/hZi8gHh43a8j9HTpTcXfzwy+c+hA+xBS1PAk/ /Q6zqqe0042D1IrpilGFBK8aW9qLCo4/NH56GHGfFKTZLZHX5ZUlr1M9vTtb6Xns okzrgHeoz9WpezUcmBS4V7oBd4sIhy9E3c4u0h+KVn38hSPWcBzGGP2xY+yioJGk vuK+0hIEXgTriq2vDmV4y6WUyEw7S0NS7rrLehAzoZvvYW70TCEXsrH1X44HIIMY nlWcbF5LOq4EfsUg9wmhidkfZv/3uNT3W9R6eu8kx39CTvgdPs70kBWe5AuJa9aQ ZbsdZfwBGPzgAJCfadMWdp83Roa4EDmrpgTUYfbf9+ridJ1rD2NJhtmOo0+01fNW WpXg6DSEwsrma2LT7GHElnWZwtrleXTVu2pw4c7yuqKIuW9RPzXaKclhywm1hHm2 xQTwlXS28ZjbfZg= =WNdn -----END PGP SIGNATURE----- Merge tag 'qcom-clk-fixes-for-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-fixes Pull a Qualcomm clk driver fix from Bjorn Andersson - Fix the clock ops for SM8450 DPTX1 aux clock src to ensure DisplayPort works * tag 'qcom-clk-fixes-for-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: clk: qcom: dispcc-sm8450: use RCG2 ops for DPTX1 AUX clock source |
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Stephen Boyd
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ce56ffbea7 |
Merge tag 'spacemit-clk-fixes-for-7.0-1' of ssh://github.com/spacemit-com/linux into clk-fixes
Pull a SpacemiT clk fix from Yixun Lan: - Fix inverted condition check * tag 'spacemit-clk-fixes-for-7.0-1' of ssh://github.com/spacemit-com/linux: clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc() |
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Stephen Boyd
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3de1320ae9 |
Microchip clock fixes for v7.0
This update includes: - fix out of bounds access for MPFS CCC clock controller -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCac9n+wAKCRCejrg/N2X7 /YmNAP0Qmy4ndM3fcHVJiTv6R7Ffs84dJLVR0RG8RYhHkI/NrgD/dRHqOOJCrvzN +zQmeYOpbFIGBJk59WYjODMeW+E+gwk= =QYc7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna12IUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSUwJBAAwEuZEG3PfD2EnbVVmMIn10SJKnKH 0dWiqcdFqEJa9byzbPiJZDz1rQWPnFBDrcDT5ptRRh8qqyjDwYxUhDXYeJcgfe0r 5E4+u4/lzH8X1cqKYMfLmffDMko7SlUeA1uM6UDPrZh1Bkm8BfNTwrdrxpkIoYQ9 7H6UGe/czwLRh7RVmGSK7MepjehfS5drFTLJnPOm8Zn3/IZwgr7UQUY/Fpswx5dZ xkbp9QJorlRhjM6qZhbjtd0rk6w0TiTtkjUUV0pFt+PId/Ua3IpAzyScyZCsalHs 0s6/J5LjCqlVFuSVnYWICKNbrYKJBrLuivgOTGBLng3Y1ZLDGMbdYQ7pJKxX5HKo /9M5hiwC8dYjYXrc4KRq9vjq+KM1WzjIXdyTFAH2ZdB8NOXyHImeoCvcKRvxyB6q jmfhcFHC9raQdTMdHDEWdxxxr9SQM2/gL/fA98RFWVh/2D5Sviz6WsDGzGJhzT1l hn4mA/Me3tuXuTKaTKioUmtI5qBgpBzVHgU0PbNY0Ubb+6uLQjdNFJnulkJRHfq3 l5E4q3mD2nLKxWECJGxo61kyW+4s82yCcKlELttaTqCuC9qEc6DE29Wn60II5pty p1QX7zLMxZADieRDY9RCL0JVDXZC8gK8Ig8lyQrLbaqJJYpnkPOuD2Vw6KwHcRuK ptuOyrkDfnP85Ig= =XW8e -----END PGP SIGNATURE----- Merge tag 'clk-microchip-fixes-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-fixes Pull a microchip clk driver fix from Claudiu Beznea: - Fix out of bounds access for MPFS CCC clock controller * tag 'clk-microchip-fixes-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: clk: microchip: mpfs-ccc: fix out of bounds access during output registration |
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Stephen Boyd
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6e42454d90 |
i.MX clock changes for 7.1
- Add optional ENET reference pad clock inputs for i.MX6Q/UL. - Fix debug output in PLL14xx driver to use unsigned format specifier. - Add 333.333 MHz and 477.4 MHz support to fracn-gppll for display use cases. - Fix device node reference leaks in i.MX6 driver. - Fix device node reference leak in of_assigned_ldb_sels(). - Fix ACM clock flags on i.MX8 to prevent SAI sysclk failures. - Move VF610_CLK_END define into the driver. - Add VF610 Ethernet switch clock support. - Correct CSI PHY parent clock selection on i.MX8MQ. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEETvPuEU56jyrKp9G4G19EyQCVFVYFAmnOcAEACgkQG19EyQCV FVbQjw/9HyOgC6B8IdrXBcWA/NnPgYTjrYwXEZnS1YCfqvj36jcSmldp6QwpDR2m 8LedEWn/AW7Qle1nSQcCAP1WBE8Acb/FWWuMVAngAJJ2lTXUiP7LL5kCvSzrKjC6 ioS7up49Fb2QgXIy1wMgdxT8WC8slNqPwq++k85vWyto8kvjOXMeDl9EWk/y1Vi4 93dVZT9sFLrmEh95pqJT5+gxslH/847xeuncCO9+Ej7ilaBgDkY07QUE9cubxF0n cEErY50wcaq0CCQPOVF16FsO7K1/+Kd19FXNNcGztHjbJjXXwm8xcW1dxCAjdAY8 0uelk7hhxcK6Me/6LGxYYGQWN4EmmjsiaQtYrQBSqea1bWbOh9jCKajSLOylln4n U+2X9eI7duZSIdEj+CVy4qIlNoTsNNsMIpG4fmNkiqMRl9o/S5bRJgwfSY+g/i6b aqjkGqespVxohpRorFzL6KjyLLxBDfUyH36SHwOcxwcXRYF0CO78JLzpmuxYQ5R4 /9n+ezw2i977w2IxsgH5nhzkfZqCSq/g7P10XJKevzZfmWcl/3L2DA1xNBX56hSk R4WT6BXRzPApX0PeSzERS53KP994TAGARMQHA3retj7reYXR9ahAhYwb6bLVK6WN p6dcUhmAGkdNncjfZz6mEyTxvdv8PD0v0C2eo88DzA7kgWeYHMg= =wlXT -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna1lwUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSWgYw/9HxHt2ROKW+3Mhp7mVzDIUnRcOS34 ZX+u/7S+OAeaXcKmzS4HMX2Lqy3Xc/rrCk5LQk0H1oIMEsQsx3uGXJN5teU7XbOj tgXy1p8/J4Cceb14pq66QcLxcCg1oeYi4KSLBRr+atHHuTIndID3dYqPNGmklzbb FziJG7biTL5U2JCLfbJwTHwjo6XqGZfT7evwYcuQntJj9JHyb9eqpHHqcvNUHK3F cXV7Or8pfnz6pXTUdPoceyYu/VJYarg7igdrY3TweigAVA+cWCe05VEwqkE7thN8 Ou4PYEUlDkKm5aM+pU28qO57qnogvZlLSLi+eF5+ntXTqpRGipBOG6+QVE3V/pCi 6NkmCMzyg+ihCTOzKk9zTunT/V0BNSXiHQ2MoiQgMWEqUSntxa6j5H1JLQUoM9ft Re4r9aX9CuFs1IFm+APrNwpPUl+V7VCQDQHEY+vNhHZlbTnSKCPewG8q9bd24mB/ LgZ0rgtGO7IQA3J8Af6nuLzBljnLtFxTze5X4BYqUebiVrVXfeb0WlI1A3SdBZN+ vHjHRctOaFehAwk8TZNWgRJie+pH31EclO3XLOYiJHzYGAjE4ePpsoxyMBonJB3M Vp613vbJwa1mdBwS7cIkDen4vjEl62Wk34k6LsfGiGycvFeelLvu6fTFn740XqnL blb4oRviOBbfquw= =M1uL -----END PGP SIGNATURE----- Merge tag 'clk-imx-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx Pull i.MX clock driver updates from Abel Vesa: - Add optional ENET reference pad clock inputs for i.MX6Q/UL - Fix debug output in PLL14xx driver to use unsigned format specifier - Add 333.333 MHz and 477.4 MHz support to fracn-gppll for display use cases - Fix device node reference leaks in i.MX6 driver - Fix device node reference leak in of_assigned_ldb_sels() - Fix ACM clock flags on i.MX8 to prevent SAI sysclk failures - Move VF610_CLK_END define into the driver - Add VF610 Ethernet switch clock support - Correct CSI PHY parent clock selection on i.MX8MQ * tag 'clk-imx-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux: clk: imx8mq: Correct the CSI PHY sels clk: vf610: Add support for the Ethernet switch clocks dt-bindings: clock: vf610: Add definitions for MTIP L2 switch dt-bindings: clock: vf610: Drop VF610_CLK_END define clk: vf610: Move VF610_CLK_END define to clk-vf610 driver clk: imx: imx8-acm: fix flags for acm clocks clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels() clk: imx: imx6q: Fix device node reference leak in pll6_bypassed() clk: imx: fracn-gppll: Add 477.4MHz support clk: imx: fracn-gppll: Add 333.333333 MHz support clk: imx: pll14xx: Use unsigned format specifier dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad |
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Stephen Boyd
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0fc42d2646 |
New clock driver for the RV1103B. For whatever reason that SoC only got
a B addition to the name, but major changes internally - likely it is pin compatible with the non-b-variant. Other change is actually exporting PCIe pipe-clocks that were already in the binding. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmnKfKQQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgR5HB/9UT3UM4Zrmubr7ZRhbFiMLkzHpP5icwV9F AQIdcPfpuH6/2ELckwcka8CElsBBd7uK/QCxd4DSBmwRhC/aYTNa2JknqO9W10Os h9aeiwLODM6SHePwFrWcL+jLKe0VxuFsVEsy/r3S8L+zMVY2PtnXUib1aAPTpOkN Ou42CLOZ1BPmpy5zAMl36IM+9SAfi6AtrCAqh3mGxYiL5dLZwHIX9njD2sT9GRXD IuF8UoKOZx/QEO9ZzjaovcqWe0n0mnDU89GvxCGT6O8yyMOldRHPHmEdBg1KZWge 2q141NagpsRjjX4v7ojOCm7nyohwdLwdmkkV00tMHzeUHDFSbpgD =/ri0 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna1f0UHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSXYKA//U6St12L/7NfTM7Pf/SR/5dZez6OE qhMATt0JoOMAJ6g7GYsXHj4QoLIJ99UxsKWziqzBpG8IyRJgK1LKOprZQ5rToN43 3YPOG5hXR/tEgMn8ici1sX/NPe37ma6oavQsaiMhYOujRGQIOhEpk/GNFMyvh7g5 YsHMEtvfn6+Uba1LcPY53wk9gSQ/hb413h9QwSJUpYufAySWwlsI8ikKmNnsk1LH NJQRgX6V4ooafBxcH1iI4nfQf6c3Q/9Ii2Xayu1vyqN1O3bNqsrZRu4/uXaVzNiq o+8ujowyDCPwpkx/BBIYjfz1F/IGvND6ESQy+m85GyEqw1gyWQALITK7HpGbcQyl qKFscJBH/IrPygurymhZmeD9oH1wvvoAf3aHlYGQ+kHv5LJegeJq5U2nLsDBvkmX KXQb8elsfMi7WR8CUaLO2dlnleQkywRZMy1eykBgVCbf5aYwzr0Fhre0E59nGPix 6IacOhuoEjWzXO6D8+1qsH7a8c94sxMoptT4dsLNnAkeetR3K04mfDWC66T7h4hq kentNCRs/ao59euiFmf0HOXYKFW2XJKXiyli7D2/ts56T0KcgwGrIyd+rOs/uleD FPOHLBsUT9h7s7lFsVIzbYEUSey7n7fs94f72BoF3WvECLnVK3Ur2CRIMNmADqs8 grmj4ijBxntKY5E= =3bVg -----END PGP SIGNATURE----- Merge tag 'v7.1-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip Pull Rockchip clk driver updates from Heiko Stuebner: - Clock driver for the Rockchip RV1103B SoC For whatever reason that SoC only got a B addition to the name, but major changes internally - likely it is pin compatible with the non-b-variant. Other change is actually exporting PCIe pipe-clocks that were already in the binding. * tag 'v7.1-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: rk3568: Add PCIe pipe clock gates clk: rockchip: Add clock controller for the RV1103B dt-bindings: clock: rockchip: Add RV1103B CRU support |
||
|
Stephen Boyd
|
98266d5f94 |
clk: renesas: Updates for v7.1 (take two)
- Add SPI clocks and resets on RZ/G3E,
- Add PCIe clocks and resets on RZ/V2N, RZ/V2H(P), and RZ/G3E,
- Enable watchdog reset on RZ/N1D,
- Remove clocks for watchdogs meant for other CPU cores on RZ/V2N,
- Handle critical clock during system resume on RZ/G2L, RZ/G2UL, and
RZ/G3S,
- Add initial support for the RZ/G3L (R9A08G046) SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull more Renesas clk driver updates from Geert Uytterhoeven:
- Add SPI clocks and resets on Renesas RZ/G3E
- Add PCIe clocks and resets on Renesas RZ/V2N, RZ/V2H(P), and RZ/G3E
- Enable watchdog reset on Renesas RZ/N1D
- Remove clocks for watchdogs meant for other CPU cores on Renesas RZ/V2N
- Handle critical clock during system resume on Renesas RZ/G2L, RZ/G2UL, and
RZ/G3S
- Add initial support for the Renesas RZ/G3L (R9A08G046) SoC
* tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: Add support for RZ/G3L SoC
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
clk: renesas: rzg2l: Re-enable critical module clocks during resume
clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
clk: renesas: rzg2l: Add helper for mod clock enable/disable
clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
clk: renesas: rzg2l: Add support for critical resets
clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
clk: renesas: r9a06g032: Enable watchdog reset sources
clk: renesas: cpg-mssr: Use struct_size() helper
clk: renesas: r9a09g047: Add PCIe clocks and reset
clk: renesas: r9a09g057: Add PCIe clocks and reset
clk: renesas: r9a09g056: Add PCIe clocks and reset
clk: renesas: r9a09g047: Add entries for the RSPIs
|
||
|
Stephen Boyd
|
5aa81ab21d |
clk: tenstorrent: Add support for Atlantis PRCM
Introduce support for the clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC. 5 types of clocks are generated by the PRCM: PLLs, shared gates and standard muxes. The reset controller is setup as an auxiliary device of the clock controller. Signed-off-by: Drew Fustini <fustini@kernel.org> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCabgcRAAKCRDb7CzD2Six DLeWAQDz7ry9bXavkEFqRuoLgC4+VXqCDHDq1eJ7RJivqhl5QwD+Khd9hCdCFLfs BVObT4dkLX5LbsMUEqFAEJSf4ISoyA4= =WZuS -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna0YUUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSVWmxAAk6KQVPihCh8NxXolnXuxwsuGq63z iU8oGrvIVZ51NBsTVz1s6kT+m5Kta4YL2BNHGhaN3ck6J7twU8gpj23Mo1n/ffn1 XOK7/JeTuXY6jHyWbqNtFaTG+gm2KRxHmFZY27qxqaBItpwXM0v3dZ9kxxDXgvrg 2KPbimyJzoFGrwvywn1Ic5isaW8NyIRVRonrYfN3Lq0dBuX08JLV6p93dy9F1yMe Z9jVBwszol2KBeDwgOKzf8aoWCkqcH41DBl5bP3fCc8sx4CxUIvyzjD7QLdFOmSp xlNnEkRJlVX9LVDBlDb+Eel3H2yR/I2jgHzoVYRWdKBRmxQjBabbRccWmyd4vE9o uJACbOTYhy5eiRpUxV6wuXB+3AP0hDDSSD1k4lgYqxjlz4qsSc7VsAvXGjJ1SyFw NQNIBZCoImEEMfsutFwE6W8X8G5TIBwbSEDEg4NWwZ4ehxw0nW8d1LEtXwFXBd77 mB948LxJ9pjMCzai5QhFd9qUCz8JER2tGJVxHII8jfmsW407/dcUMH1y2Vp905pW P99waWf1t90oA2yqyB6k6YcOneo6ItpJliXjqpnKBT8WHfUKytDb4V90LNCq3XiX Q8OAz1OkAVoLToSxrpAzG/aPqj/sreoDDBePGAEoZikHBQcdFsI0UjiX15eV7XIs +y+IOBEeMTJMJgo= =PZOt -----END PGP SIGNATURE----- Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrent Pull Tenstorrent clk driver updates from Drew Fustini: - Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC * tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux: clk: tenstorrent: Add Atlantis clock controller driver reset: tenstorrent: Add reset controller for Atlantis dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu |
||
Biju Das
|
77894661c0 |
clk: renesas: Add support for RZ/G3L SoC
The clock structure for RZ/G3L is almost identical to that of the RZ/G3S SoC with more IP blocks such as LCDC, CRU, LVDS, and GPU. Add minimal clock and reset entries required to boot the system on Renesas RZ/G3L SMARC EVK and bind it with the RZ/G2L CPG core driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324114329.268249-8-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
Geert Uytterhoeven
|
30e7ff3598 |
Renesas RZ/G3L DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/G3L (R9A08G046) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCacV+yAAKCRCKwlD9ZEnx cM9HAQDcklDcgpObjF+qzxC3O5ktUR8uVE+KaaKy/DiyYkZO0AEAyG8NUK3unTZY 6ZLj8DIpHVjHIhBPUGzjzNt30OYj4g8= =a7gU -----END PGP SIGNATURE----- Merge tag 'renesas-r9a08g046-dt-binding-defs-tag1' into renesas-clk-for-v7.1 Renesas RZ/G3L DT Binding Definitions DT bindings and binding definitions for the Renesas RZ/G3L (R9A08G046) SoC, shared by driver and DT source files. |
||
|
Biju Das
|
b822fb8250 |
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
Document the device tree bindings for the Renesas RZ/G3L SoC Clock Pulse
Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5 clocks
compared to 1 clock on other SoCs.
Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as
listed in section 4.4.4.1 ("Block Diagram of the Clock System"), module
clock outputs, as listed in section 4.4.2 ("Clock List r1.00") and add
Reset definitions referring to registers CPG_RST_* in Section 4.4.3
("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025).
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260324114329.268249-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
|
Biju Das
|
bf497e7bab |
clk: renesas: rzg2l: Re-enable critical module clocks during resume
After a suspend/resume cycle, critical module clocks (CLK_IS_CRITICAL) may be left disabled as there is no owning driver to restore them, unlike regular clocks. Add rzg2l_mod_enable_crit_clock_init_mstop() which walks all module clocks on resume, re-enables any critical clock found disabled, and then restores the MSTOP state for clocks that have one via the existing helper. This replaces the direct call to rzg2l_mod_clock_init_mstop() in rzg2l_cpg_resume(), preserving the correct clock-before-MSTOP restore ordering. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324114329.268249-7-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Biju Das
|
fa3e973ca2 |
clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
Refactor the mstop initialisation logic in rzg2l_mod_clock_init_mstop() into a dedicated helper function rzg2l_mod_clock_init_mstop_helper(). This decouples the logic for setting module stop state on disabled clocks from the iteration loop, allowing it to be reused during resume to re-enable critical clocks. No functional change. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Biju Das
|
867fb0bc60 |
clk: renesas: rzg2l: Add helper for mod clock enable/disable
Refactor rzg2l_mod_clock_endisable() by extracting its logic into a new helper function rzg2l_mod_clock_endisable_helper(), which accepts an additional set_mstop_state boolean parameter. This allows callers to control whether the module stop state is updated alongside the clock enable/disable operation. No functional change for existing callers. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324114329.268249-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Biju Das
|
5865d2525a |
clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
The RZ/G2L SoC family requires DMA resets to be deasserted for routing some peripheral interrupts to the CPU. Asserting these resets after boot would silently break interrupt delivery with no driver to restore them. Mark the DMA resets as critical by adding them to the crit_resets table in the SoC-specific rzg2l_cpg_info for r9a07g043, r9a07g044, and r9a08g045, preventing __rzg2l_cpg_assert() from asserting them and ensuring they are deasserted during probe and resume. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Biju Das
|
3d700746d7 |
clk: renesas: rzg2l: Add support for critical resets
Some reset lines must remain deasserted at all times after boot, as asserting them would disable critical system functionality with no owning driver to restore them. This mirrors the existing crit_mod_clks mechanism which protects critical module clocks from being disabled. On RZ/G2L family SoCs, the DMA reset must be remain deasserted for routing some peripheral interrupts to CPU. Add crit_resets and num_crit_resets fields to struct rzg2l_cpg_info to allow SoC-specific data tables to declare reset IDs that must never be asserted. Introduce rzg2l_cpg_deassert_crit_resets() to iterate over all critical resets and deassert them. Call it both at probe time and during resume to ensure critical peripherals are held out of reset after power-on and suspend/resume cycles. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Fabrizio Castro
|
44ed098c6e |
clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
The Renesas RZ/V2N SoC (a.k.a. r9a09g056) comes with 4 watchdogs.
As it turns out, it only makes sense for Linux to have access to
WDT1.
Remove the clock and reset entries for WDT{0,2,3} to prevent
interfering with the CM33 core.
This change is harmless as only WDT1 is currently used in Linux,
there are no users for the WDT{0,2,3} IPs.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260324225239.19136-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
Herve Codina (Schneider Electric)
|
2fcaaf15e4 |
clk: renesas: r9a06g032: Enable watchdog reset sources
The watchdog timeout is signaled using an interrupt and, on this interrupt, a software initiated reset is performed. This software initiated reset performs, in the end, a hardware system reset using SWRST_REQ of RSTCTRL register. The watchdog itself is able to control directly the hardware system reset without any operation done by the interrupt handler. This feature allows the watchdog to not depend on the software to reset the system when a watchdog timeout occurs. Indeed, when the watchdog timeout occurs, the watchdog requests a system reset using its own hardware dedicated line but this reset source is disabled at the reset controller level. To benefit of this feature and be robust against software issues, enable watchdogs reset sources. Suggested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324120435.243641-2-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
Rosen Penev
|
0e590f4d99 |
clk: renesas: cpg-mssr: Use struct_size() helper
struct_size() is what is normally used when a flexible array member is present to avoid accidental mistakes. pm_size is still needed for the memcpy() call below. Added __counted_by for extra runtime analysis. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324021103.13651-1-rosenp@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
Caleb James DeLisle
|
d8b034525f |
clk: airoha: Add econet EN751221 clock/reset support to en7523-scu
EcoNet EN751221 clock/reset driver is significantly similar to the EN7523 / EN7581, however the EN751221 does not have a neat batch of clock divider registers so there are fewer known clocks, and the frequency of each clock is derived differently. This clock driver will probably work correctly on EN751627, EN7528, and EN7580. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Caleb James DeLisle
|
35af99f748 |
dt-bindings: clock, reset: Add econet EN751221
Add clock and reset bindings for EN751221 as well as a "chip-scu" which is an additional regmap that is used by the clock driver as well as others. This split of the SCU across two register areas is the same as the Airoha AN758x family. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Xuyang Dong
|
858f6273cf |
MAINTAINERS: Add entry for ESWIN EIC7700 clock driver
Add myself as maintainer of ESWIN EIC7700 clock driver Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # ebc77 Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Xuyang Dong
|
cd44f127c1 |
clk: eswin: Add eic7700 clock driver
Add clock drivers for the EIC7700 SoC. The clock controller on the ESWIN EIC7700 provides various clocks to different IP blocks within the SoC. Signed-off-by: Yifeng Huang <huangyifeng@eswincomputing.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # ebc77 Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Tested-by: Bo Gan <ganboing@gmail.com> # hfp550 Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Xuyang Dong
|
8add6d87dc |
clk: divider: Add devm_clk_hw_register_divider_parent_data
Add the devres variant of clk_hw_register_divider_parent_data() for registering a divider clock with parent clk data instead of parent name. Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Xuyang Dong
|
1fb8313260 |
dt-bindings: clock: eswin: Documentation for eic7700 SoC
Add device tree binding documentation for the ESWIN eic7700 clock controller module. Signed-off-by: Yifeng Huang <huangyifeng@eswincomputing.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Troy Mitchell <troy.mitchell@linux.dev> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # ebc77 Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Maíra Canal
|
672299736a |
clk: bcm: rpi: Manage clock rate in prepare/unprepare callbacks
On current firmware versions, RPI_FIRMWARE_SET_CLOCK_STATE doesn't actually power off the clock. To achieve meaningful power savings, the clock rate must be set to the minimum before disabling. This might be fixed in future firmware releases. Rather than pushing rate management to clock consumers, handle it directly in the clock framework's prepare/unprepare callbacks. In unprepare, set the rate to the minimum before disabling the clock. In prepare, for clocks marked with `maximize` (currently v3d), restore the rate to the maximum after enabling. Signed-off-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Shuwei Wu
|
54e97360b4 |
clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
Fix inverted condition that skips frequency change trigger,
causing kernel panics during cpufreq scaling.
Fixes:
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|
Stephen Boyd
|
96df81372d |
clk: renesas: Updates for v7.1
- Add RTC clocks and resets on RZ/V2N. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCabPo9AAKCRCKwlD9ZEnx cHwnAQDRvIFwQXk7962k2OwLFAWC8POsOvw/UaRBJ8+6G8A2sgEA/veR86BS9VnR Kqqw17QAMzg/mqJ8t35vp+r8k0CvYAw= =csXz -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmnB14AUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSVDVw//ca6b9zC/RWj+KV9MdS+X2wh70RM3 FYq0QaGtDgeH0ZZc/D79oIykZIuJ2QukUfy9lodfCr0H8AJSqFSyHZd7me9cxlz7 kYG90GbGpXYDLakPN89EUG+Qv2a4UecrVhAux/SFayw7nvEIV9//UxdT5IH7liUP /g0cWXwdjgBkdo8OG1wZ0g5LEkjS38p9gmY+H1ZRVuw6fvuqALwF/wvoYqdt0wgz AUNPPITHDEvDEBXFpi9YxnDW4CZLY0Skz20fHHkrW/Mg2vsliZAZsestlHReZGD8 5/1LiVPW8T87weG8lVUWXsSRFZ0emJLbyH7KihRS+sEG3+i0TUVar3ebOhRW3lyC cnZqothuiTP+3JkLnVa5TCNXpswlPxiXJt1Zw8lM8rXstk0Lc77O3kR5rLCmNdC1 qhashgh1ttDkNPV76J8ln5RM35mPPLSviHa3A/4geZsCZqywpwZj2Umj81vP0G3k 5lTUuUDTkPBv6Oplb05+pGE1fPV/zZdi1smEsMXgZ1ZzCQ/8VncXdnmmG09CAIs5 QKH62nIarPByK2iEoPVS2VCNyO2uSOguK0/EGKhlOAB1NAnjfAfvH6OaIjlRhiO3 A2bB0WcAvKTQgcTk29ctelzdCnBEqDuJNDqUn5I7NvGcU+wMlk8xx17SYGLtFmrh bQC5gYSJi2h18Bs= =3TiA -----END PGP SIGNATURE----- Merge tag 'renesas-clk-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas Pull Renesas clk driver updates from Geert Uytterhoeven: - Add RTC clocks and resets on Renesas RZ/V2N * tag 'renesas-clk-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r9a09g056: Add clock and reset entries for RTC |
||
|
Stephen Boyd
|
e7a45dec40 |
clk: renesas: Fixes for v7.0
- Fix ordering of module clocks arrays on RZ/V2H(P) and RZ/V2N,
- Remove clocks for watchdogs meant for other CPU cores on the
RZ/V2H(P) SoC.
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Merge tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-fixes
Pull Renesas clk driver fixes from Geert Uytterhoeven:
- Fix ordering of module clocks arrays on Renesas RZ/V2H(P) and RZ/V2N
- Remove clocks for watchdogs meant for other CPU cores on the
Renesas RZ/V2H(P) SoC
* tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
clk: renesas: r9a09g056: Fix ordering of module clocks array
clk: renesas: r9a09g057: Fix ordering of module clocks array
|
||
Linus Torvalds
|
c369299895 | Linux 7.0-rc5 v7.0-rc5 | ||
Mikko Perttunen
|
ec69c9e883 |
i2c: tegra: Don't mark devices with pins as IRQ safe
I2C devices with associated pinctrl states (DPAUX I2C controllers) will change pinctrl state during runtime PM. This requires taking a mutex, so these devices cannot be marked as IRQ safe. Add PINCTRL as dependency to avoid build errors. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/all/E1vsNBv-00000009nfA-27ZK@rmk-PC.armlinux.org.uk/ Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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|
Linus Torvalds
|
d5273fd3ca |
bpf-fixes
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|
Linus Torvalds
|
ac57fa9faf |
tracing fixes for 7.0:
- Revert "tracing: Remove pid in task_rename tracing output" A change was made to remove the pid field from the task_rename event because it was thought that it was always done for the current task and recording the pid would be redundant. This turned out to be incorrect and there are a few corner case where this is not true and caused some regressions in tooling. - Fix the reading from user space for migration The reading of user space uses a seq lock type of logic where it uses a per-cpu temporary buffer and disables migration, then enables preemption, does the copy from user space, disables preemption, enables migration and checks if there was any schedule switches while preemption was enabled. If there was a context switch, then it is considered that the per-cpu buffer could be corrupted and it tries again. There's a protection check that tests if it takes a hundred tries, it issues a warning and exits out to prevent a live lock. This was triggered because the task was selected by the load balancer to be migrated to another CPU, every time preemption is enabled the migration task would schedule in try to migrate the task but can't because migration is disabled and let it run again. This caused the scheduler to schedule out the task every time it enabled preemption and made the loop never exit (until the 100 iteration test triggered). Fix this by enabling and disabling preemption and keeping migration enabled if the reading from user space needs to be done again. This will let the migration thread migrate the task and the copy from user space will likely pass on the next iteration. - Fix trace_marker copy option freeing The "copy_trace_marker" option allows a tracing instance to get a copy of a write to the trace_marker file of the top level instance. This is managed by a link list protected by RCU. When an instance is removed, a check is made if the option is set, and if so synchronized_rcu() is called. The problem is that an iteration is made to reset all the flags to what they were when the instance was created (to perform clean ups) was done before the check of the copy_trace_marker option and that option was cleared, so the synchronize_rcu() was never called. Move the clearing of all the flags after the check of copy_trace_marker to do synchronize_rcu() so that the option is still set if it was before and the synchronization is performed. - Fix entries setting when validating the persistent ring buffer When validating the persistent ring buffer on boot up, the number of events per sub-buffer is added to the sub-buffer meta page. The validator was updating cpu_buffer->head_page (the first sub-buffer of the per-cpu buffer) and not the "head_page" variable that was iterating the sub-buffers. This was causing the first sub-buffer to be assigned the entries for each sub-buffer and not the sub-buffer that was supposed to be updated. - Use "hash" value to update the direct callers When updating the ftrace direct callers, it assigned a temporary callback to all the callback functions of the ftrace ops and not just the functions represented by the passed in hash. This causes an unnecessary slow down of the functions of the ftrace_ops that is not being modified. Only update the functions that are going to be modified to call the ftrace loop function so that the update can be made on those functions. -----BEGIN PGP SIGNATURE----- iIoEABYKADIWIQRRSw7ePDh/lE+zeZMp5XQQmuv6qgUCacAMahQccm9zdGVkdEBn b29kbWlzLm9yZwAKCRAp5XQQmuv6qr0sAQCoI4L3iAR5HU1z8dw2GWhOz9fTnzfw 9VPRZAsga9J5xgEA1Y0bvKBM0UPHFAL2POkaILYV1aT00lZ7aIVHPqfdYgA= =OoGW -----END PGP SIGNATURE----- Merge tag 'trace-v7.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace Pull tracing fixes from Steven Rostedt: - Revert "tracing: Remove pid in task_rename tracing output" A change was made to remove the pid field from the task_rename event because it was thought that it was always done for the current task and recording the pid would be redundant. This turned out to be incorrect and there are a few corner case where this is not true and caused some regressions in tooling. - Fix the reading from user space for migration The reading of user space uses a seq lock type of logic where it uses a per-cpu temporary buffer and disables migration, then enables preemption, does the copy from user space, disables preemption, enables migration and checks if there was any schedule switches while preemption was enabled. If there was a context switch, then it is considered that the per-cpu buffer could be corrupted and it tries again. There's a protection check that tests if it takes a hundred tries, it issues a warning and exits out to prevent a live lock. This was triggered because the task was selected by the load balancer to be migrated to another CPU, every time preemption is enabled the migration task would schedule in try to migrate the task but can't because migration is disabled and let it run again. This caused the scheduler to schedule out the task every time it enabled preemption and made the loop never exit (until the 100 iteration test triggered). Fix this by enabling and disabling preemption and keeping migration enabled if the reading from user space needs to be done again. This will let the migration thread migrate the task and the copy from user space will likely pass on the next iteration. - Fix trace_marker copy option freeing The "copy_trace_marker" option allows a tracing instance to get a copy of a write to the trace_marker file of the top level instance. This is managed by a link list protected by RCU. When an instance is removed, a check is made if the option is set, and if so synchronized_rcu() is called. The problem is that an iteration is made to reset all the flags to what they were when the instance was created (to perform clean ups) was done before the check of the copy_trace_marker option and that option was cleared, so the synchronize_rcu() was never called. Move the clearing of all the flags after the check of copy_trace_marker to do synchronize_rcu() so that the option is still set if it was before and the synchronization is performed. - Fix entries setting when validating the persistent ring buffer When validating the persistent ring buffer on boot up, the number of events per sub-buffer is added to the sub-buffer meta page. The validator was updating cpu_buffer->head_page (the first sub-buffer of the per-cpu buffer) and not the "head_page" variable that was iterating the sub-buffers. This was causing the first sub-buffer to be assigned the entries for each sub-buffer and not the sub-buffer that was supposed to be updated. - Use "hash" value to update the direct callers When updating the ftrace direct callers, it assigned a temporary callback to all the callback functions of the ftrace ops and not just the functions represented by the passed in hash. This causes an unnecessary slow down of the functions of the ftrace_ops that is not being modified. Only update the functions that are going to be modified to call the ftrace loop function so that the update can be made on those functions. * tag 'trace-v7.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace: ftrace: Use hash argument for tmp_ops in update_ftrace_direct_mod ring-buffer: Fix to update per-subbuf entries of persistent ring buffer tracing: Fix trace_marker copy link list updates tracing: Fix failure to read user space from system call trace events tracing: Revert "tracing: Remove pid in task_rename tracing output" |
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|
Linus Torvalds
|
11ac4ce3f7 |
i2c-for-7.0-rc5
pxa: fix broken I2C communication on Armada 3700 with recovery fsi: fix device_node reference leak in probe cp2615: fix NULL-deref when serial string is missing -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmm/trAACgkQFA3kzBSg KbaRxQ//a6yPhI6jQ8NDNnaO3c/RwvLbJsOyh7y7Q3cXl1IVbb6bPEY/PWJBGGeK XbmtqdT8vR7sh/OoxwSJYH70ZtRi0aWpL5adabiOl8VJhnW3rABrWS5WIBgm9djL k6p+lnTGNJHWw3PzwVb7lzkgkmyolc2g6qzpTJJd+it39G/ChPTt6vOU6wNgWSMK auRY59FBRwMkKymMt1co77bmvi/ehFm/Ohsjs4/bGkPr/Ngq6wVtm7tcdu5drShR VcexM+yu92pLBr7zR/p89E36W7aqWPGl8K7aYyDJjYXDHcOcRJAHjKi4lf+boCNa ze4dg66Hj6ONVgxOF5lTFGP3ITPg/JP02kskRlVqzJsZdm8hIQraq5eJEUBF0rWZ WsA/E8SuGeNe3hDck5YyoaNbpww0Ph1y+MgNglMXS/hKedEZL7ku5mU66wA1gjjm ek18V0rAFiBP3Ch7vTK4Se1CE1TUUSNoPdEwdPU5/3T8ZZLbgRewr4z5FPL2+Yb+ NdGy6ZPV7rRYXxQVVbNTQ9c4h4cuBYZgnrRGfYXyXXyQ77m5mZlMBa4emPoNExtO 9U2fxbfHU2QBTG0lMOWkbEtMc1bVSvYtDwv1X2gFsdkOy+tmyCDkDHsp0hqao0oo C5rlOYTl/9U6byrpBe8GiCrKHNNmtiuSDJzRUhdXHb8JqqPqp+c= =m7EX -----END PGP SIGNATURE----- Merge tag 'i2c-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c fixes from Wolfram Sang: - fix broken I2C communication on Armada 3700 with recovery - fix device_node reference leak in probe (fsi) - fix NULL-deref when serial string is missing (cp2615) * tag 'i2c-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: pxa: defer reset on Armada 3700 when recovery is used i2c: fsi: Fix a potential leak in fsi_i2c_probe() i2c: cp2615: fix serial string NULL-deref at probe |
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|
Linus Torvalds
|
8d8bd2a5aa |
Miscellaneous x86 fixes:
- Improve Qemu MCE-injection behavior by only using
AMD SMCA MSRs if the feature bit is set.
- Fix the relative path of gettimeofday.c inclusion
in vclock_gettime.c
- Fix a boot crash on UV clusters when a socket is
marked as 'deconfigured' which are mapped to the
SOCK_EMPTY (0xffff [short -1]) node ID by the UV firmware,
while Linux APIs expect NUMA_NO_NODE (0xffffffff [int -1]).
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'x86-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar:
- Improve Qemu MCE-injection behavior by only using AMD SMCA MSRs if
the feature bit is set
- Fix the relative path of gettimeofday.c inclusion in vclock_gettime.c
- Fix a boot crash on UV clusters when a socket is marked as
'deconfigured' which are mapped to the SOCK_EMPTY node ID by
the UV firmware, while Linux APIs expect NUMA_NO_NODE.
The difference being (0xffff [unsigned short ~0]) vs [int -1]
* tag 'x86-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/platform/uv: Handle deconfigured sockets
x86/entry/vdso: Fix path of included gettimeofday.c
x86/mce/amd: Check SMCA feature bit before accessing SMCA MSRs
|
||
|
Linus Torvalds
|
ebfd9b7af2 |
Miscellaneous perf fixes:
- Fix a PMU driver crash on AMD EPYC systems, caused by
a race condition in x86_pmu_enable()
- Fix a possible counter-initialization bug in x86_pmu_enable()
- Fix a counter inheritance bug in inherit_event() and
__perf_event_read()
- Fix an Intel PMU driver branch constraints handling bug
found by UBSAN
- Fix the Intel PMU driver's new Off-Module Response (OMR)
support code for Diamond Rapids / Nova lake, to fix a snoop
information parsing bug
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'perf-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
- Fix a PMU driver crash on AMD EPYC systems, caused by
a race condition in x86_pmu_enable()
- Fix a possible counter-initialization bug in x86_pmu_enable()
- Fix a counter inheritance bug in inherit_event() and
__perf_event_read()
- Fix an Intel PMU driver branch constraints handling bug
found by UBSAN
- Fix the Intel PMU driver's new Off-Module Response (OMR)
support code for Diamond Rapids / Nova lake, to fix a snoop
information parsing bug
* tag 'perf-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Fix OMR snoop information parsing issues
perf/x86/intel: Add missing branch counters constraint apply
perf: Make sure to use pmu_ctx->pmu for groups
x86/perf: Make sure to program the counter value for stopped events on migration
perf/x86: Move event pointer setup earlier in x86_pmu_enable()
|
||
|
Linus Torvalds
|
dea622e183 |
Fix 3 more livepatching related build environment bugs,
and fix a false positive warning with Clang jump tables. Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmm/o/YRHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1i7Lw/8DSESHczzmJVAteyX1Di5zUTWl1+bvO0M gRcDN/7Mycs2LGwCXpjCEDOBUmG9kfQyDbwxQgMc9K59VWyDvhPmxiy2tF8JE6F0 2LYjq7uW9Tno2OENGXglDOiExLg6v8g1ERn6q8Xdq3VYMuIb6aRdlOWwTv6TQ22m DdO9BQwCTd07KQsKlSfIUPKM/+zfoPMLbO2dsGfO64BhPxUkvzyR1gaNlhnDYfYy xbC3RkQsnA1OO9+bFK5zRimSjKxK/kDt1UH3HAJutP/kArWEZ84lv2faDfW8xHIQ cYgIzNL1Vq1nPb0mDuApff4i8DSGE4GdTphKmsqJeXOqaFCnYOKfr09D3H5bP8+S Vg7AqEaDUQIIMzZsZIh3zb2WKyf5oC/ZbcP5D+ryCCq9/TCrEeysj/4NmlrX/Vfg X4yqo5uJR4gqtBg1Vut9SNzEWMstxtUX5VT+e9S58Cy8UZcOvEE66laXPN1am5u9 mNXMHnLJglrbIOISf3W74bcJOrVy5MI8z7TzTu2uL7qctw/pg1Sd4wut7MZ3cBv3 Jg4qfIUKVDq06pnKDLxMT5Nv70Dh+TwWIITA331LBgFeipaAHblPKEpmv0lc/Rx1 p85buVOVxonAxEGgLYvbt4KmuO8iV5ikSFkgrx93qBFPKFYXIfbXXPK9Uq2Dxbyl gb69W40BjwE= =W/aM -----END PGP SIGNATURE----- Merge tag 'objtool-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull objtool fixes from Ingo Molnar: "Fix three more livepatching related build environment bugs, and a false positive warning with Clang jump tables" * tag 'objtool-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: objtool: Fix Clang jump table detection livepatch/klp-build: Fix inconsistent kernel version objtool/klp: fix mkstemp() failure with long paths objtool/klp: fix data alignment in __clone_symbol() |
||
|
Linus Torvalds
|
d56d4a110f |
Fix a Sparse build errors regression in <linux/local_lock_internal.h>
caused by the locking context-analysis changes. Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmm/ovMRHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1hiMA/+MiNrnVNtbLBib1HOeYeli7MLFZ4VqTj5 MPHvRPXX/RyfFYa1pr9tQZUOMa7xTL8Dk5qiyQ1gDvCKrT16LR8/7sNelK395csz WJIzb4Ec4ugIQXtS3hUhNLc4yffGmLd2aSV66OomSEQ7wDD5+yXtyq7rXeX2bYAt kTQ6OR0WanHIgrBRJWrFazYhBt0ZNNDfEczjbbDY/816qG/6Q46G+NiTDKWV0G83 8Ll7FrIVBj8q+8XlzUDmmbDP9eCMGK2Nj++l7AlUqxPO0qNo+8PpQseOp7qoOerx IAE6fOHPuY/VnAJYHc/hnCVN92Dzs4UQjpYXCL7bME7TdiIVVDfE4mACa/47O6K1 ifyWxM8RM4UWEeb1QRb73VgLvl8v9biul0twBjnRXW0bFCHCm8s7qR/1HSU7y/wf 3C55EtjV3uKyNAqHlwrtLQv+RdYjgxzKWTjcNp0kz5eoE1Bs1KLX3xwZR5xN6/jO EYVZCp480wphYc0rs7+FNerYDQW3RXDhZMTei19De8OPDeQPYxAGkscyyCgwguyR ks8FEFAYJgT9c9tLU44ziZG56zeOqJcj2mq95er6XpOzVyn2txLD2YDpoyE3mB55 pTwzLT3I4I75eB6l5IQObqliQkxK3i9LNELWZiHVP97LPsukTSbiFvCBso7mmi+2 Eg2Vcp/RqD8= =o1hi -----END PGP SIGNATURE----- Merge tag 'locking-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fix from Ingo Molnar: "Fix a sparse build error regression in <linux/local_lock_internal.h> caused by the locking context-analysis changes" * tag 'locking-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: include/linux/local_lock_internal.h: Make this header file again compatible with sparse |
||
|
Linus Torvalds
|
b5fddfad34 |
Fix a mailbox channel leak in the riscv-rpmi-sysmsi irqchip
driver. Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmm/og4RHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1i7sA//Qxn4k58utBtxIZlEo0vlVUB3kBTPOyRN Y73LrkP8RUA0MTIfMlK8W5TABDr7c1yIYT7qA5f8BRWUaovex1zQUcDJqW8GM8if A9mnu2BkXf9prj95RrDjujhcA1Xef9ZrrgcpLYkVR1jtlDD9Y25pvL1Dn567kqL+ IogsHqIFPG9oigEcQwciFo54WE2gkqJwer2oK+f0CWv5AobWZYPoCJjLD0+3FJ5z Ghf75Hd9yHHbNQn/z000/ljr6GSE4V5iPEN0b00FlLYNUwSJENBLEP5pMQVSyB7z eFK8fd36TDYH9bcyDn4N/5ATiiM03/obaG8NYAJi8yxVL8CQ6dwUcRWqRcEN0kIy zN/B+NS8TgDURIUWzbHWXavOv1UvyBk/rxi0KlbL82GWHhyjAsCuT4UJZlS79CSN 3/LW+zg1lHOyB+IIjLVWj28K3wLsFSLMxh6hjHuJKHovnxyn7V0iJk3NMxtTjCMz MN6FqMNS9Dzdix9/fZwMJBgkUw9qG4keUBH7XY0reJ4yZRcy84VYzPIMaLNSC/sw RGzC7cbx9bYxFCgxJ7Dk947gmZK2CFSneiFsrcNcBDY2777I9/Yzm5tYQ2CpGQRA QxZWh2maq6RZ74Sgzv1RK2KSh5cUbAxbv1tDuTBmg7Nh7ymyRLIf+zNdCiyqyJV8 FNuv8/se+wo= =sc8B -----END PGP SIGNATURE----- Merge tag 'irq-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fix from Ingo Molnar: "Fix a mailbox channel leak in the riscv-rpmi-sysmsi irqchip driver" * tag 'irq-urgent-2026-03-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/riscv-rpmi-sysmsi: Fix mailbox channel leak in rpmi_sysmsi_probe() |
||
|
Linus Torvalds
|
d723091c8c |
Driver core fixes for 7.0-rc5
- Generalize driver_override in the driver core, providing a common sysfs implementation and concurrency-safe accessors for bus implementations - Do not use driver_override as IRQ name in the hwmon axi-fan driver - Remove an unnecessary driver_override check in sh platform_early - Migrate the platform bus to use the generic driver_override infrastructure, fixing a UAF condition caused by accessing the driver_override field without proper locking in the platform_match() callback -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS2q/xV6QjXAdC7k+1FlHeO1qrKLgUCab6dRwAKCRBFlHeO1qrK LnELAP9MkP5mnaIbAM5/kYWaG+nQhsBTdzSbLSqv0vca7bljlwD/RFzAXOaCKvNz 8GrnY7FHzGSMPQhT+L86idGRCPmujgI= =dxv9 -----END PGP SIGNATURE----- Merge tag 'driver-core-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core Pull driver core fixes from Danilo Krummrich: - Generalize driver_override in the driver core, providing a common sysfs implementation and concurrency-safe accessors for bus implementations - Do not use driver_override as IRQ name in the hwmon axi-fan driver - Remove an unnecessary driver_override check in sh platform_early - Migrate the platform bus to use the generic driver_override infrastructure, fixing a UAF condition caused by accessing the driver_override field without proper locking in the platform_match() callback * tag 'driver-core-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core: driver core: platform: use generic driver_override infrastructure sh: platform_early: remove pdev->driver_override check hwmon: axi-fan: don't use driver_override as IRQ name docs: driver-model: document driver_override driver core: generalize driver_override in struct device |
||
Jiri Olsa
|
50b35c9e50 |
ftrace: Use hash argument for tmp_ops in update_ftrace_direct_mod
The modify logic registers temporary ftrace_ops object (tmp_ops) to trigger
the slow path for all direct callers to be able to safely modify attached
addresses.
At the moment we use ops->func_hash for tmp_ops filter, which represents all
the systems attachments. It's faster to use just the passed hash filter, which
contains only the modified sites and is always a subset of the ops->func_hash.
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Daniel Borkmann <daniel@iogearbox.net>
Cc: Andrii Nakryiko <andrii@kernel.org>
Cc: Menglong Dong <menglong8.dong@gmail.com>
Cc: Song Liu <song@kernel.org>
Link: https://patch.msgid.link/20260312123738.129926-1-jolsa@kernel.org
Fixes:
|
||
Masami Hiramatsu (Google)
|
f35dbac694 |
ring-buffer: Fix to update per-subbuf entries of persistent ring buffer
Since the validation loop in rb_meta_validate_events() updates the same
cpu_buffer->head_page->entries, the other subbuf entries are not updated.
Fix to use head_page to update the entries field, since it is the cursor
in this loop.
Cc: stable@vger.kernel.org
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Ian Rogers <irogers@google.com>
Fixes:
|
||
Steven Rostedt
|
07183aac4a |
tracing: Fix trace_marker copy link list updates
When the "copy_trace_marker" option is enabled for an instance, anything
written into /sys/kernel/tracing/trace_marker is also copied into that
instances buffer. When the option is set, that instance's trace_array
descriptor is added to the marker_copies link list. This list is protected
by RCU, as all iterations uses an RCU protected list traversal.
When the instance is deleted, all the flags that were enabled are cleared.
This also clears the copy_trace_marker flag and removes the trace_array
descriptor from the list.
The issue is after the flags are called, a direct call to
update_marker_trace() is performed to clear the flag. This function
returns true if the state of the flag changed and false otherwise. If it
returns true here, synchronize_rcu() is called to make sure all readers
see that its removed from the list.
But since the flag was already cleared, the state does not change and the
synchronization is never called, leaving a possible UAF bug.
Move the clearing of all flags below the updating of the copy_trace_marker
option which then makes sure the synchronization is performed.
Also use the flag for checking the state in update_marker_trace() instead
of looking at if the list is empty.
Cc: stable@vger.kernel.org
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Link: https://patch.msgid.link/20260318185512.1b6c7db4@gandalf.local.home
Fixes:
|
||
|
Steven Rostedt
|
edca33a562 |
tracing: Fix failure to read user space from system call trace events
The system call trace events call trace_user_fault_read() to read the user
space part of some system calls. This is done by grabbing a per-cpu
buffer, disabling migration, enabling preemption, calling
copy_from_user(), disabling preemption, enabling migration and checking if
the task was preempted while preemption was enabled. If it was, the buffer
is considered corrupted and it tries again.
There's a safety mechanism that will fail out of this loop if it fails 100
times (with a warning). That warning message was triggered in some
pi_futex stress tests. Enabling the sched_switch trace event and
traceoff_on_warning, showed the problem:
pi_mutex_hammer-1375 [006] d..21 138.981648: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981651: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981656: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981659: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981664: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981667: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981671: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981675: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981679: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981682: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981687: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981690: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981695: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981698: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981703: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981706: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981711: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981714: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981719: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981722: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981727: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981730: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
pi_mutex_hammer-1375 [006] d..21 138.981735: sched_switch: prev_comm=pi_mutex_hammer prev_pid=1375 prev_prio=95 prev_state=R+ ==> next_comm=migration/6 next_pid=47 next_prio=0
migration/6-47 [006] d..2. 138.981738: sched_switch: prev_comm=migration/6 prev_pid=47 prev_prio=0 prev_state=S ==> next_comm=pi_mutex_hammer next_pid=1375 next_prio=95
What happened was the task 1375 was flagged to be migrated. When
preemption was enabled, the migration thread woke up to migrate that task,
but failed because migration for that task was disabled. This caused the
loop to fail to exit because the task scheduled out while trying to read
user space.
Every time the task enabled preemption the migration thread would schedule
in, try to migrate the task, fail and let the task continue. But because
the loop would only enable preemption with migration disabled, it would
always fail because each time it enabled preemption to read user space,
the migration thread would try to migrate it.
To solve this, when the loop fails to read user space without being
scheduled out, enabled and disable preemption with migration enabled. This
will allow the migration task to successfully migrate the task and the
next loop should succeed to read user space without being scheduled out.
Cc: stable@vger.kernel.org
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Link: https://patch.msgid.link/20260316130734.1858a998@gandalf.local.home
Fixes:
|
||
Xuewen Yan
|
a6f22e50c7 |
tracing: Revert "tracing: Remove pid in task_rename tracing output"
This reverts commit |
||
Daniel Borkmann
|
4a04d13576 |
selftests/bpf: Add a test cases for sync_linked_regs regarding zext propagation
Add multiple test cases for linked register tracking with alu32 ops:
- Add a test that checks sync_linked_regs() regarding reg->id (the linked
target register) for BPF_ADD_CONST32 rather than known_reg->id (the
branch register).
- Add a test case for linked register tracking that exposes the cross-type
sync_linked_regs() bug. One register uses alu32 (w7 += 1, BPF_ADD_CONST32)
and another uses alu64 (r8 += 2, BPF_ADD_CONST64), both linked to the
same base register.
- Add a test case that exercises regsafe() path pruning when two execution
paths reach the same program point with linked registers carrying
different ADD_CONST flags (BPF_ADD_CONST32 from alu32 vs BPF_ADD_CONST64
from alu64). This particular test passes with and without the fix since
the pruning will fail due to different ranges, but it would still be
useful to carry this one as a regression test for the unreachable div
by zero.
With the fix applied all the tests pass:
# LDLIBS=-static PKG_CONFIG='pkg-config --static' ./vmtest.sh -- ./test_progs -t verifier_linked_scalars
[...]
./test_progs -t verifier_linked_scalars
#602/1 verifier_linked_scalars/scalars: find linked scalars:OK
#602/2 verifier_linked_scalars/sync_linked_regs_preserves_id:OK
#602/3 verifier_linked_scalars/scalars_neg:OK
#602/4 verifier_linked_scalars/scalars_neg_sub:OK
#602/5 verifier_linked_scalars/scalars_neg_alu32_add:OK
#602/6 verifier_linked_scalars/scalars_neg_alu32_sub:OK
#602/7 verifier_linked_scalars/scalars_pos:OK
#602/8 verifier_linked_scalars/scalars_sub_neg_imm:OK
#602/9 verifier_linked_scalars/scalars_double_add:OK
#602/10 verifier_linked_scalars/scalars_sync_delta_overflow:OK
#602/11 verifier_linked_scalars/scalars_sync_delta_overflow_large_range:OK
#602/12 verifier_linked_scalars/scalars_alu32_big_offset:OK
#602/13 verifier_linked_scalars/scalars_alu32_basic:OK
#602/14 verifier_linked_scalars/scalars_alu32_wrap:OK
#602/15 verifier_linked_scalars/scalars_alu32_zext_linked_reg:OK
#602/16 verifier_linked_scalars/scalars_alu32_alu64_cross_type:OK
#602/17 verifier_linked_scalars/scalars_alu32_alu64_regsafe_pruning:OK
#602/18 verifier_linked_scalars/alu32_negative_offset:OK
#602/19 verifier_linked_scalars/spurious_precision_marks:OK
#602 verifier_linked_scalars:OK
Summary: 1/19 PASSED, 0 SKIPPED, 0 FAILED
Co-developed-by: Puranjay Mohan <puranjay@kernel.org>
Signed-off-by: Puranjay Mohan <puranjay@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/r/20260319211507.213816-2-daniel@iogearbox.net
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
|
||
|
Daniel Borkmann
|
bc308be380 |
bpf: Fix sync_linked_regs regarding BPF_ADD_CONST32 zext propagation
Jenny reported that in sync_linked_regs() the BPF_ADD_CONST32 flag is
checked on known_reg (the register narrowed by a conditional branch)
instead of reg (the linked target register created by an alu32 operation).
Example case with reg:
1. r6 = bpf_get_prandom_u32()
2. r7 = r6 (linked, same id)
3. w7 += 5 (alu32 -- r7 gets BPF_ADD_CONST32, zero-extended by CPU)
4. if w6 < 0xFFFFFFFC goto safe (narrows r6 to [0xFFFFFFFC, 0xFFFFFFFF])
5. sync_linked_regs() propagates to r7 but does NOT call zext_32_to_64()
6. Verifier thinks r7 is [0x100000001, 0x100000004] instead of [1, 4]
Since known_reg above does not have BPF_ADD_CONST32 set above, zext_32_to_64()
is never called on alu32-derived linked registers. This causes the verifier
to track incorrect 64-bit bounds, while the CPU correctly zero-extends the
32-bit result.
The code checking known_reg->id was correct however (see scalars_alu32_wrap
selftest case), but the real fix needs to handle both directions - zext
propagation should be done when either register has BPF_ADD_CONST32, since
the linked relationship involves a 32-bit operation regardless of which
side has the flag.
Example case with known_reg (exercised also by scalars_alu32_wrap):
1. r1 = r0; w1 += 0x100 (alu32 -- r1 gets BPF_ADD_CONST32)
2. if r1 > 0x80 - known_reg = r1 (has BPF_ADD_CONST32), reg = r0 (doesn't)
Hence, fix it by checking for (reg->id | known_reg->id) & BPF_ADD_CONST32.
Moreover, sync_linked_regs() also has a soundness issue when two linked
registers used different ALU widths: one with BPF_ADD_CONST32 and the
other with BPF_ADD_CONST64. The delta relationship between linked registers
assumes the same arithmetic width though. When one register went through
alu32 (CPU zero-extends the 32-bit result) and the other went through
alu64 (no zero-extension), the propagation produces incorrect bounds.
Example:
r6 = bpf_get_prandom_u32() // fully unknown
if r6 >= 0x100000000 goto out // constrain r6 to [0, U32_MAX]
r7 = r6
w7 += 1 // alu32: r7.id = N | BPF_ADD_CONST32
r8 = r6
r8 += 2 // alu64: r8.id = N | BPF_ADD_CONST64
if r7 < 0xFFFFFFFF goto out // narrows r7 to [0xFFFFFFFF, 0xFFFFFFFF]
At the branch on r7, sync_linked_regs() runs with known_reg=r7
(BPF_ADD_CONST32) and reg=r8 (BPF_ADD_CONST64). The delta path
computes:
r8 = r7 + (delta_r8 - delta_r7) = 0xFFFFFFFF + (2 - 1) = 0x100000000
Then, because known_reg->id has BPF_ADD_CONST32, zext_32_to_64(r8) is
called, truncating r8 to [0, 0]. But r8 used a 64-bit ALU op -- the
CPU does NOT zero-extend it. The actual CPU value of r8 is
0xFFFFFFFE + 2 = 0x100000000, not 0. The verifier now underestimates
r8's 64-bit bounds, which is a soundness violation.
Fix sync_linked_regs() by skipping propagation when the two registers
have mixed ALU widths (one BPF_ADD_CONST32, the other BPF_ADD_CONST64).
Lastly, fix regsafe() used for path pruning: the existing checks used
"& BPF_ADD_CONST" to test for offset linkage, which treated
BPF_ADD_CONST32 and BPF_ADD_CONST64 as equivalent.
Fixes:
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Alexei Starovoitov
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06880982c6 |
Merge branch 'bpf-fix-unsound-scalar-forking-for-bpf_or'
Daniel Wade says:
====================
bpf: Fix unsound scalar forking for BPF_OR
maybe_fork_scalars() unconditionally sets the pushed path dst register
to 0 for both BPF_AND and BPF_OR. For AND this is correct (0 & K == 0),
but for OR it is wrong (0 | K == K, not 0). This causes the verifier to
track an incorrect value on the pushed path, leading to a verifier/runtime
divergence that allows out-of-bounds map value access.
v4: Use block comment style for multi-line comments in selftests (Amery Hung)
Add Reviewed-by/Acked-by tags
v3: Use single-line comment style in selftests (Alexei Starovoitov)
v2: Use push_stack(env, env->insn_idx, ...) to re-execute the insn
on the pushed path (Eduard Zingerman)
====================
Link: https://patch.msgid.link/20260314021521.128361-1-danjwade95@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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