All Ethernet AVB instances on R-Car V3U have registers related to UDP/IP
support, but the declared register blocks for the first two instances
are too small to cover them.
Fix this by extending the register block sizes.
Fixes: 5a633320f0 ("arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ce6ce3c4b1495e02e7c1803fca810a7178a84500.1707660323.git.geert+renesas@glider.be
Add PSCI support to enable suspend/resume with the help of TF-A.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208135629.2840932-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ethernet IRQ GPIOs are marked as GPIO hogs. Thus, these GPIOs are
requested at probe time without considering if there are other
peripherals that need them. The Ethernet IRQ GPIOs are shared with
SDHI2. Selection between Ethernet and SDHI2 is done through a hardware
switch. To avoid scenarios where one wants to boot with SDHI2 support
and some SDHI pins are not propertly configured because of the GPIO
hogs, guard the Ethernet IRQ GPIO hogs with the proper build flag.
Fixes: 932ff0c802 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sound uses the standard 5V supply, so rename the fixed regulator as
such. Also add properties documenting it is always on, also during boot.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129212350.33370-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
It is named T1.8V in the schematics. Also add properties documenting it
is always on, also during boot.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129212350.33370-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Without them, no power, so cards do not get recognized.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129135840.28988-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add initial support for the Renesas Gray Hawk Single board, which is
based on the R-Car V4M (R8A779H0) SoC:
- Memory,
- Crystal oscillators,
- Serial console.
Based on the White Hawk Single DTS, and on a patch for the Gray Hawk
board stack in the BSP by Hai Pham.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be
Clock and Power Domain definitions for the Renesas R-Car V4M (R8A779H0)
SoC, shared by driver and DT source files.
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Merge tag 'renesas-r8a779h0-dt-binding-defs-tag' into renesas-dts-for-v6.9
Renesas R-Car V4M DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V4M (R8A779H0)
SoC, shared by driver and DT source files.
Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S
SoC (R9108G045).
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240122111115.2861835-10-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The White Hawk Single board is a single-board integration of the Renesas
White Hawk CPU and Breakout board stack, based on the R-Car V4H ES2.0
(R8A779G2) SoC.
For now, the only visible differences compared to the board stack are:
- The SoC is an updated version of R-Car V4H (R8A779G0),
- The serial console uses an FT2232H instead of a CP2102 USB-UART
bridge, with CTS/RTS wired.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/2b8d37949c17cca170c1d9e97f10a100b20c5cd9.1706192990.git.geert+renesas@glider.be
The White Hawk CSI/DSI and RAVB/Ethernet(1000Base-T1) sub boards are not
specific to R-Car V4H.
Hence rename their DTS file names to drop the "r8a779g0-" prefix, and
remove any references to R-Car V4H.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f89613d0df04cfa6196f8797fe655cf7cec812de.1706192990.git.geert+renesas@glider.be
Schematics say that all these 3.3v sources are driven by "D3.3V".
We have a regulator for it already in ulcb.dtsi. Use it instead.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240117131807.24997-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
According to Table 8.1, "Summary of Module Power, Reset condition and
Clock assignment" of the R-Mobile APE6 Hardware Manual Rev. 0.7, the
parent clock of the thermal sensor clock is the Common Peripheral (CP)
clock, which runs at 13 MHz (main clock / 2).
As the R-Car Thermal driver does not use the clock rate, this change has
no functional impact.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/aac49d67d7a38230875543d49e84fcca587fb9e1.1705315614.git.geert+renesas@glider.be
Add the Common Peripheral (CP) clock, which is driven by the main
clock / 2 during normal system operation, but may be driven by EXTALR
during early system boot, when SYSCLK_EN is still low. As the latter is
irrelevant to Linux, just model it as a fixed clock driven from
main_div2_clk.
Switch all users of main_div2_clk that are documented to be clocked by
the CP clock to cp_clk, to better reflect the actual clock topology.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/f9826b0755207a1e16871c17daca109fb11f3868.1705315614.git.geert+renesas@glider.be
External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
and overridden in the board .dts when present.
Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
oscillator present on the APE6-EVM board.
Fixes: a76809a329 ("ARM: shmobile: r8a73a4: Common clock framework DT description")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
RZ SMARC Carrier II board has 3 user buttons called USER_SW1, USER_SW2,
USER_SW3. Add a DT node in device tree to propertly instantiate the
gpio-keys driver for these buttons.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231227130810.2744550-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
