Commit graph

712,088 commits

Author SHA1 Message Date
VNSL Durga
05e0bd10a9 arm64: zynqmp: Added clocks to DT for ep108
Added clks for ep108 platform.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:35 +02:00
Alistair Francis
e881e58709 arm64: zynqmp: Use C pre-processor for includes
Change the dtsi include code to use the C pre-processor #include instead
of the device tree /include/. This enables option to use dt binding
headers.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:35 +02:00
Michal Simek
932bd0d8db arm64: zynqmp: Add fpd/lpd dmas
Wire fpd and lpd dma channels to zynqmp.dtsi.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:34 +02:00
Naga Sureshkumar Relli
2f9ed1999a arm64: zynqmp: Set status disabled in dtsi
Do not enable smmu via dtsi. Enable it in board file when needed.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:34 +02:00
Michal Simek
27af3993f7 arm64: zynqmp: Add new uartps compatible string
Mainline kernel has r1p12 compatible string now. Use this new compatible
string and also append generic compatible string.
Keep in your mind that using this generic compatible string not all uart
features will be available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <mdf@kernel.org>
2017-08-21 14:07:33 +02:00
Edgar E. Iglesias
e199f2cc1e arm64: zynqmp: Correct IRQ nr for the SMMU
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:33 +02:00
Michal Simek
7fb7820c57 arm64: zynqmp: Add support for RTC
Add support for RTC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:32 +02:00
Bharat Kumar Gogada
4a6514d523 arm64: zynqmp: Adding prefetchable memory space to pcie node
Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:32 +02:00
Michal Simek
8c50b1e435 arm64: zynqmp: Add CCI-400 node
Add CCI-400 node to DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:31 +02:00
Michal Simek
17e76f95a4 arm64: zynqmp: Add dcc console for zynqmp
Add debug console to dtsi to be able to enable it in
board dts file.
Keep in your mind that every core has separate dcc port in case you want
to run SMP kernel.
DCC is very helpful communication channel for debugging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:31 +02:00
Shubhrajyoti Datta
e31b7bb8e2 arm64: zynqmp: Add operating points
Adding operating-points-v2 for zynqmp.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:30 +02:00
Stefan Krsmanovic
1e4e25c8ae arm64: zynqmp: Add idle state for ZynqMP
Added the idle-states node to describe zynqmp idle states. Only
cpu-sleep-0 idle state is added in this patch. References to the
idle-states node are added in all CPU nodes. Time values: entry/exit
latencies and min-residency, needs to be tuned. arm,psci-suspend-param
is selected to comply with PSCIv1.0 and Extended StateID format.

Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:30 +02:00
Michal Simek
400e188fa8 arm64: zynqmp: Add references to cpu nodes
Add missing references to all cpu nodes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <mdf@kernel.org>
2017-08-21 14:07:29 +02:00
Michal Simek
63301178e9 arm64: zynqmp: Move nodes which have no reg property out of bus
Nodes without reg properties shouldn't be placed in amba node.
Move them out.

Warnings:
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg):
Node /amba/misc_clk missing or empty reg/ranges property
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg):
Node /amba/i2c_clk missing or empty reg/ranges property
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg):
Node /amba/sata_clk missing or empty reg/ranges property
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dtb: Warning (simple_bus_reg):

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 14:07:22 +02:00
Jan Kara
6c83fd5142 quota: Add lock annotations to struct members
Add annotation which lock protects which struct members to struct dquot
and struct mem_dqinfo.

Signed-off-by: Jan Kara <jack@suse.cz>
2017-08-21 14:06:46 +02:00
Michal Simek
21ad06cc9e arm: zynq: Remove earlycon from bootargs
Earlyconsole is used for early kernel debugging that's why this option
shouldn't be enabled by default.
Earlyconsole is partially copying the part of the bootlog after
"bootconsole [uart0] disabled".

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 13:54:42 +02:00
Michal Simek
1188c024f2 arm: zynq: Use C pre-processor for includes in dts
Change the dtsi include code to use the C pre-processor #include instead
of the device tree /include/. This brings all Zynq device trees inline
with each other.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 13:52:56 +02:00
Michal Simek
3c220bf420 arm: zynq: Label whole PL part as fpga_full region
This will simplify dt overlay structure for the whole PL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 13:52:49 +02:00
Sai Pavan Boddu
e5e6f6872c arm: zynq: Add device-type property for zynq ethernet phy nodes
Mention device-type = "ethernet-phy", as qemu will need this in absence
of compatible.

Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 13:52:43 +02:00
Christian Kohn
b090348922 arm: zynq: Add adv7511 on i2c bus for zc70x
Describe adv7511 on i2c bus.

Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-21 13:52:35 +02:00
Shawn Lin
d83c2dbaa9 mmc: block: prevent propagating R1_OUT_OF_RANGE for open-ending mode
We to some extent should tolerate R1_OUT_OF_RANGE for open-ending
mode as it is expected behaviour and most of the backup partition
tables should be located near some of the last blocks which will
always make open-ending read exceed the capacity of cards.

Fixes: 9820a5b111 ("mmc: core: for data errors, take response of stop cmd into account")
Fixes: a04e6bae9e ("mmc: core: check also R1 response for stop commands")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-21 13:32:31 +02:00
David Lechner
2798c4b75a ARM: dts: da850-lego-ev3: Add node for LCD display
This adds a new node for the LEGO MINDSTORMS EV3 LCD display.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-08-21 16:45:11 +05:30
David Lechner
8c0b16fb33 ARM: davinci_all_defconfig: enable tinydrm and ST7586
This enables the tinydrm and ST7586 panel modules used by the display
on LEGO MINDSTORMS EV3.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-08-21 16:28:24 +05:30
Takashi Sakamoto
3a93d082ba ALSA: firewire-motu: add support for MOTU Audio Express
MOTU Audio Express is one of third generation in MOTU FireWire
series, produced in 2011. This model consists of three chips:
 * TI TSB41AB2 (Physical layer for IEEE 1394 bus)
 * Microchip USB3300 (Hi-Speed USB Device with ULPI interface)
 * Xilinx Spartan-3A FPGA, XC3S400A (Link layer for IEEE 1394 bus, packet
   processing and data block processing layer)

This commit adds support for this model. As I expected, it works with
current implementaion of protocol version 3. On the other hand, the unit
has a quirk to request subaction originated by any driver.

11:45:51.287643 firewire_ohci 0000:03:00.0: AT spd 2 tl 1f, ffc1 -> ffc0, -reserved-, QW req, fffff0000b14 = 02000200
11:45:51.289193 firewire_ohci 0000:03:00.0: AR spd 2 tl 1f, ffc0 -> ffc1, ack_complete, W resp
11:45:51.289381 fireire_core 0000:03:00.0: unsolicited response (source ffc0, tlabel 1f)
11:45:51.313071 firewire_ohci 0000:03:00.0: AT spd 2 tl 20, ffc1 -> ffc0, ack_pending , QW req, fffff0000b14 = 02000200
11:45:51.314539 firewire_ohci 0000:03:00.0: AR spd 2 tl 20, ffc0 -> ffc1, ack_complete, W resp

In 1394 OHCI (rev.1.1), after OUTPUT_LAST* descriptors is processed,
'xferStaus' field is filled with 'ContextControl[0:15]' (see clause 7.1.3).
5 bits in LSB side of the field has ack code in acknowledge from the unit
(see clause 7.2.2). A list of the code is shown in Table 3-2.

As long as I investigated, in a case of the '-reserved-' acknowledge
message from the unit, the field has 0x10. On the table, this value is
'Reserved for definition by future 1394 standards'. As long as I know,
any specifications of IEEE 1394 has no such extensions, thus the unit is
out of specification. Besides, I note that the unit does not always
acknowledge with the invalid code. I guess this is a bug of firmware. I
confirmed the bug in firmware version 1.04 and this is the latest one.

$ cd linux-firewire-utils
$ python2 ./src/crpp < /sys/bus/firewire/devices/fw1/config_rom
               ROM header and bus information block
               -----------------------------------------------------------------
400  0410a756  bus_info_length 4, crc_length 16, crc 42838
404  31333934  bus_name "1394"
408  20ff7000  irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 255, max_rec 7 (256)
40c  0001f200  company_id 0001f2     |
410  000a8a7b  device_id 00000a8a7b  | EUI-64 0001f200000a8a7b

               root directory
               -----------------------------------------------------------------
414  0004ef04  directory_length 4, crc 61188
418  030001f2  vendor
41c  0c0083c0  node capabilities per IEEE 1394
420  d1000002  --> unit directory at 428
424  8d000005  --> eui-64 leaf at 438

               unit directory at 428
               -----------------------------------------------------------------
428  00031680  directory_length 3, crc 5760
42c  120001f2  specifier id
430  13000033  version
434  17104800  model

               eui-64 leaf at 438
               -----------------------------------------------------------------
438  00025ef3  leaf_length 2, crc 24307
43c  0001f200  company_id 0001f2     |
440  000a8a7b  device_id 00000a8a7b  | EUI-64 0001f200000a8a7b

Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-08-21 12:24:23 +02:00
Takashi Sakamoto
8b460c76bd ALSA: firewire-motu: add specification flag for position of flag for MIDI messages
In protocols of MOTU FireWire series, when transferring MIDI messages,
transmitter set existence flag to one byte on first several quadlets. The
position differs depending on protocols and models, however two cases are
confirmed; in 5th byte and 8th byte from MSB side.

This commit adds a series of specification flag to describe them. When
the existence flag is in the 5th byte, SND_MOTU_SPEC_[R|T]X_MIDI_2ND_Q is
used. Else, another set of the flag is used. Here, '_Q' means quadlet.

Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-08-21 12:24:00 +02:00
Catalin Marinas
af29678fe7 arm64: Remove the !CONFIG_ARM64_HW_AFDBM alternative code paths
Since the pte handling for hardware AF/DBM works even when the hardware
feature is not present, make the pte accessors implementation permanent
and remove the corresponding #ifdefs. The Kconfig option is kept as it
can still be used to disable the feature at the hardware level.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21 11:13:11 +01:00
Catalin Marinas
64c26841b3 arm64: Ignore hardware dirty bit updates in ptep_set_wrprotect()
ptep_set_wrprotect() is only called on CoW mappings which are private
(!VM_SHARED) with the pte either read-only (!PTE_WRITE && PTE_RDONLY) or
writable and software-dirty (PTE_WRITE && !PTE_RDONLY && PTE_DIRTY).
There is no race with the hardware update of the dirty state: clearing
of PTE_RDONLY when PTE_WRITE (a.k.a. PTE_DBM) is set. This patch removes
the code setting the software PTE_DIRTY bit in ptep_set_wrprotect() as
superfluous. A VM_WARN_ONCE is introduced in case the above logic is
wrong or the core mm code changes its use of ptep_set_wrprotect().

Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21 11:13:00 +01:00
Catalin Marinas
73e86cb03c arm64: Move PTE_RDONLY bit handling out of set_pte_at()
Currently PTE_RDONLY is treated as a hardware only bit and not handled
by the pte_mkwrite(), pte_wrprotect() or the user PAGE_* definitions.
The set_pte_at() function is responsible for setting this bit based on
the write permission or dirty state. This patch moves the PTE_RDONLY
handling out of set_pte_at into the pte_mkwrite()/pte_wrprotect()
functions. The PAGE_* definitions to need to be updated to explicitly
include PTE_RDONLY when !PTE_WRITE.

The patch also removes the redundant PAGE_COPY(_EXEC) definitions as
they are identical to the corresponding PAGE_READONLY(_EXEC).

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21 11:12:50 +01:00
Catalin Marinas
0966253d7c kvm: arm64: Convert kvm_set_s2pte_readonly() from inline asm to cmpxchg()
To take advantage of the LSE atomic instructions and also make the code
cleaner, convert the kvm_set_s2pte_readonly() function to use the more
generic cmpxchg().

Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21 11:12:39 +01:00
Catalin Marinas
3bbf7157ac arm64: Convert pte handling from inline asm to using (cmp)xchg
With the support for hardware updates of the access and dirty states,
the following pte handling functions had to be implemented using
exclusives: __ptep_test_and_clear_young(), ptep_get_and_clear(),
ptep_set_wrprotect() and ptep_set_access_flags(). To take advantage of
the LSE atomic instructions and also make the code cleaner, convert
these pte functions to use the more generic cmpxchg()/xchg().

Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-08-21 11:12:29 +01:00
Romain Perier
6f2dea1f5f arm64: dts: rockchip: Add basic cpu frequencies for RK3368
This adds and enable the operating points that have been tested and are
currently supported by the SoC. This also adds clocks for ARMCLKL and
ARMCLKB.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21 12:08:37 +02:00
Joseph Chen
1e28037ec8 arm64: dts: rockchip: add rk805 node for rk3328-evb
RK805 consists of 4 DCDCs, 3 LDOs. It's different from RK808
and RK818 that there are 2 output only GPIOs, we should add
properties "gpio-controller" and "gpio-cells = <2>".

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21 12:03:51 +02:00
Finn Thain
558d5ad276 m68k/mac: Avoid soft-lockup warning after mach_power_off
Disable interrupts for power-off, like other platforms do. This prevents
meaningless warnings from the soft-lockup detector on models with a power
supply unit not under software control.

Reported-by: Stan Johnson <userm57@yahoo.com>
Tested-by: Stan Johnson <userm57@yahoo.com>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2017-08-21 11:52:56 +02:00
Finn Thain
41e93a3087 m68k/mac: Don't hang waiting for Cuda power-down command
Testing shows that the CUDA_POWERDOWN command never completes (for a
Centris 660av or LC 475, at least). So, don't wait for command completion
on those Cuda-based models that do not support soft power. Just proceed to
log the usual message, "It is now safe to turn off your Macintosh."

Reported-by: Stan Johnson <userm57@yahoo.com>
Tested-by: Stan Johnson <userm57@yahoo.com>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2017-08-21 11:52:55 +02:00
Ben Hutchings
07144be9c1 m68k: Restore symbol versions for symbols exported from assembly
WARNING: EXPORT symbol "__divsi3" [vmlinux] version generation failed, symbol will not be versioned.
WARNING: EXPORT symbol "__umodsi3" [vmlinux] version generation failed, symbol will not be versioned.
WARNING: EXPORT symbol "__mulsi3" [vmlinux] version generation failed, symbol will not be versioned.
WARNING: EXPORT symbol "__modsi3" [vmlinux] version generation failed, symbol will not be versioned.
WARNING: EXPORT symbol "__udivsi3" [vmlinux] version generation failed, symbol will not be versioned.

Add <asm/asm-prototypes.h> so that genksyms knows the types of these
symbols and can generate CRCs for them.

Fixes: d13ffb5630 ("m68k: move exports to definitions"
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
[geert: Add warning messages, match actual prototypes in gccint.info]
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2017-08-21 11:52:55 +02:00
Geert Uytterhoeven
883e3847d8 m68k/defconfig: Update defconfigs for v4.13-rc1
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2017-08-21 11:52:20 +02:00
Andy Yan
684bcba8ec ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb
Add dt node of bosch accelerometer bma250e on rv1108 evb.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21 11:52:00 +02:00
Andy Yan
a6e31eb34b ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb
RK805 is used as the voltage regulator on rv1108 evaluation
board. Add device tree node for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21 11:47:47 +02:00
Borislav Petkov
d6c8103b02 x86/CPU: Align CR3 defines
Align them vertically for better readability and use BIT_ULL() macro.

No functionality change.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Link: http://lkml.kernel.org/r/20170821080651.4527-1-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-21 11:35:50 +02:00
Heiner Kallweit
03619844d8 rtc: ds1307: fix regmap config
Current max_register setting breaks reading nvram on certain chips and
also reading the standard registers on RX8130 where register map starts
at 0x10.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Fixes: 11e5890b53 "rtc: ds1307: convert driver to regmap"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-08-21 11:08:03 +02:00
Chris Wilson
d41a3c2be1 drm/i915: Clear lost context-switch interrupts across reset
During a global reset, we disable the irq. As we disable the irq, the
hardware may be raising a GT interrupt that we then ignore, leaving it
pending in the GTIIR. After the reset, we then re-enable the irq,
triggering the pending interrupt. However, that interrupt was for the
stale state from before the reset, and the contents of the CSB buffer
are now invalid.

v2: Add a comment to make it clear that the double clear is purely my
paranoia.

Reported-by: "Dong, Chuanxiao" <chuanxiao.dong@intel.com>
Fixes: 821ed7df6e ("drm/i915: Update reset path to fix incomplete requests")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Dong, Chuanxiao" <chuanxiao.dong@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170807121919.30165-1-chris@chris-wilson.co.uk
Link: https://patchwork.freedesktop.org/patch/msgid/20170818090509.5363-1-chris@chris-wilson.co.uk
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
(cherry picked from commit 64f09f00ca)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-08-21 11:52:35 +03:00
Andy Shevchenko
a93c115275 drm/i915/bxt: use NULL for GPIO connection ID
The commit 213e08ad60
	("drm/i915/bxt: add bxt dsi gpio element support")
enables GPIO support for Broxton based platforms.

While using that API we might get into troubles in the future, because
we can't rely on label name in the driver since vendor firmware might
provide any GPIO pin there, e.g. "reset", and even mark it in _DSD (in
which case the request will fail).

To avoid inconsistency and potential issues we have two options:
a) generate GPIO ACPI mapping table and supply it via
   acpi_dev_add_driver_gpios(), or
b) just pass NULL as connection ID.

The b) approach is much simpler and would work since the driver relies
on GPIO indices only. Moreover, the _CRS fallback mechanism, when
requesting GPIO, has been made stricter, and supplying non-NULL
connection ID when neither _DSD, nor GPIO ACPI mapping is present, is
making request fail.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101921
Fixes: f10e4bf663 ("gpio: acpi: Even more tighten up ACPI GPIO lookups")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Tested-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170817105541.63914-1-andriy.shevchenko@linux.intel.com
(cherry picked from commit cd55a1fbd2)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-08-21 11:52:29 +03:00
Thierry Reding
7755daf5e7 Merge branch 'for-4.14/drivers' into for-next 2017-08-21 10:39:16 +02:00
Bartlomiej Zolnierkiewicz
08a4d8ec42 pwm: pwm-samsung: fix suspend/resume support
Fix suspend/resume support:

- add disabled_mask to struct samsung_pwm_chip to track PWM
  disabled state information in pwm_samsung_{disable,enable}()

- rename pwm_samsung_config() to __pwm_samsung_config() and
  add extra force_period parameter to be used during resume
  (to force tin_ns and tcnt recalculation)

- add pwm_samsung_config() wrapper for preserving old behavior

- properly restore PWM configuration in pwm_samsung_resume()

- remove no longer needed pwm_samsung_suspend()

- update Copyrights

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:12 +02:00
Bartlomiej Zolnierkiewicz
23aa19a22e pwm: samsung: Remove redundant checks from pwm_samsung_config()
If the requested period_ns and duty_ns values are identical to the last
programmed ones pwm_samsung_config() returns early and skips the
hardware configuration. The same checks are now done by the PWM core so
the driver specific ones can be removed.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:11 +02:00
Zhi Mao
8bdb65dc85 pwm: mediatek: Disable clock on PWM configuration failure
Make sure to disable the PWM clock if the PWM cannot be configured due
to the clock divider exceeding the maximum value.

While at it, replace the hardcoded maximum clock divider with a defined
constant to improve code readability.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:11 +02:00
Zhi Mao
62843a6152 dt-bindings: pwm: Add MT2712/MT7622 information
Enhance the MediaTek PWM binding with details about the IP found in the
MT2712 and MT7622 SoCs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:10 +02:00
Zhi Mao
e7c197ec97 pwm: mediatek: Fix clock control issue
In order to save some power, do not prepare the top and main clocks
during mtk_pwm_probe(). Instead, prepare the clocks only when necessary
and also make sure to enable the clocks to match the semantics of the
common clock framework.

While at it, don't explicitly disable all PWM channels in ->remove()
because all users should have done that already.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:09 +02:00
Zhi Mao
cd30798a6c pwm: mediatek: Fix PWM source clock selection
In original code, the PWM output frequency is not correct when set
bit<3>=1 to PWMCON register.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:09 +02:00
Zhi Mao
aa12d7a7a9 pwm: mediatek: Fix Kconfig description
Fix a copy/paste error that sneaked into the Kconfig description of the
Mediatek PWM driver.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:08 +02:00