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1,105,074 commits

Author SHA1 Message Date
Maxime Ripard
e4fff65fdb
drm/sun4i: layer: Remove redundant zpos initialisation
The sun4i KMS driver will call drm_plane_create_zpos_property() with an
init value depending on the plane type.

Since the initial value wasn't carried over in the state, the driver had
to set it again in sun4i_backend_layer_reset().
However, the helpers have been adjusted to set it properly at reset, so
this is not needed anymore.

Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@lists.linux.dev
Cc: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-18-maxime@cerno.tech
2022-02-25 17:57:10 +01:00
Maxime Ripard
67f0f2e430
drm/sti: plane: Remove redundant zpos initialisation
The sti KMS driver will call drm_plane_create_zpos_property() with an
init value depending on the plane type.

Since the initial value wasn't carried over in the state, the driver had
to set it again in sti_plane_reset().
However, the helpers have been adjusted to set it properly at reset, so
this is not needed anymore.

Reviewed-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Philippe Cornu <philippe.cornu@foss.st.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-17-maxime@cerno.tech
2022-02-25 17:57:05 +01:00
Maxime Ripard
dad911d3c4
drm/rcar: plane: Remove redundant zpos initialisation
The rcar-du KMS driver will call drm_plane_create_zpos_property() with an
init value depending on the plane type.

Since the initial value wasn't carried over in the state, the driver had
to set it again in rcar_du_plane_reset() and rcar_du_vsp_plane_reset().
However, the helpers have been adjusted to set it properly at reset, so
this is not needed anymore.

Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-16-maxime@cerno.tech
2022-02-25 17:57:01 +01:00
Maxime Ripard
84352ed2b0
drm/omap: plane: Remove redundant zpos initialisation
The omap KMS driver will call drm_plane_create_zpos_property() with an
init value of the plane index and the plane type.

Since the initial value wasn't carried over in the state, the driver had
to set it again in omap_plane_reset(). However, the helpers have been
adjusted to set it properly at reset, so this is not needed anymore.

Reviewed-by: Tomi Valkeinen <tomba@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-15-maxime@cerno.tech
2022-02-25 17:56:55 +01:00
Maxime Ripard
ef0a04a010
drm/nouveau/kms: Remove redundant zpos initialisation
The nouveau KMS driver will call drm_plane_create_zpos_property() with
an init value depending on the plane purpose.

Since the initial value wasn't carried over in the state, the driver had
to set it again in nv50_wndw_reset(). However, the helpers have been
adjusted to set it properly at reset, so this is not needed anymore.

Cc: nouveau@lists.freedesktop.org
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Karol Herbst <kherbst@redhat.com>
Cc: Lyude Paul <lyude@redhat.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-14-maxime@cerno.tech
2022-02-25 17:56:48 +01:00
Maxime Ripard
c228cb343a
drm/msm/mdp5: Remove redundant zpos initialisation
The mdp KMS driver will call drm_plane_create_zpos_property() with an
init value depending on the plane purpose.

Since the initial value wasn't carried over in the state, the driver had
to set it again in mdp5_plane_reset(). However, the helpers have been
adjusted to set it properly at reset, so this is not needed anymore.

Cc: freedreno@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org
Cc: Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-13-maxime@cerno.tech
2022-02-25 17:56:38 +01:00
Dave Stevenson
1a7998dab5
drm/object: Add default zpos value at reset
The drm_plane_create_zpos_property() function asks for an initial value,
and will set the associated plane state variable with that value if a
state is present.

However, that function is usually called at a time where there's no
state yet. Since the drm_plane_state reset helper doesn't take care of
reading that value when it's called, it means that in most cases the
initial value will be 0, or the drivers will have to work around it.

Let's add some code in __drm_atomic_helper_plane_state_reset() to get
the initial zpos value if the property has been attached in order to fix
this.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-8-maxime@cerno.tech
2022-02-25 17:56:16 +01:00
Dave Stevenson
adf47b7529
drm/object: Add drm_object_property_get_default_value() function
Some functions to create properties (drm_plane_create_zpos_property or
drm_plane_create_color_properties for example) will ask for a range of
acceptable value and an initial one.

This initial value is then stored in the values array for that property.

Let's provide an helper to access this property.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-7-maxime@cerno.tech
2022-02-25 17:55:42 +01:00
Maxime Ripard
f6e63222c0
drm/omap: plane: Fix zpos initial value mismatch
While the omap_plane_init() function calls
drm_plane_create_zpos_property() with an initial value of 0,
omap_plane_reset() will force it to another value depending on the plane
type.

Fix the discrepancy by setting the initial zpos value to the same value
in the drm_plane_create_zpos_property() call.

Reviewed-by: Tomi Valkeinen <tomba@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220221095918.18763-5-maxime@cerno.tech
2022-02-25 17:55:12 +01:00
Randy Dunlap
e01b042e58 net: stmmac: fix return value of __setup handler
__setup() handlers should return 1 on success, i.e., the parameter
has been handled. A return of 0 causes the "option=value" string to be
added to init's environment strings, polluting it.

Fixes: 47dd7a540b ("net: add support for STMicroelectronics Ethernet controllers.")
Fixes: f3240e2811 ("stmmac: remove warning when compile as built-in (V2)")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Igor Zhbanov <i.zhbanov@omprussia.ru>
Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0defe3@omprussia.ru
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Link: https://lore.kernel.org/r/20220224033536.25056-1-rdunlap@infradead.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-02-25 08:53:17 -08:00
Randy Dunlap
50e06ddcee net: sxgbe: fix return value of __setup handler
__setup() handlers should return 1 on success, i.e., the parameter
has been handled. A return of 0 causes the "option=value" string to be
added to init's environment strings, polluting it.

Fixes: acc18c147b ("net: sxgbe: add EEE(Energy Efficient Ethernet) for Samsung sxgbe")
Fixes: 1edb9ca69e ("net: sxgbe: add basic framework for Samsung 10Gb ethernet driver")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Igor Zhbanov <i.zhbanov@omprussia.ru>
Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0defe3@omprussia.ru
Cc: Siva Reddy <siva.kallam@samsung.com>
Cc: Girish K S <ks.giri@samsung.com>
Cc: Byungho An <bh74.an@samsung.com>
Link: https://lore.kernel.org/r/20220224033528.24640-1-rdunlap@infradead.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-02-25 08:53:13 -08:00
Yifan Zhang
111aeed25e drm/amdgpu: add gfxoff support for smu 13.0.5
this patch adds gfxoff support for smu 13.0.5

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-25 11:51:18 -05:00
Yifan Zhang
cefbe72496 drm/amd/pm: refine smu 13.0.5 pp table code
Based on smu 13.0.5 features, refine pp table code.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-25 11:51:18 -05:00
Lad Prabhakar
c5048a7b2c can: rcar_canfd: rcar_canfd_channel_probe(): register the CAN device when fully ready
Register the CAN device only when all the necessary initialization is
completed. This patch makes sure all the data structures and locks are
initialized before registering the CAN device.

Link: https://lore.kernel.org/all/20220221225935.12300-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-02-25 17:46:54 +01:00
Eric W. Biederman
0ac983f512 ucounts: Fix systemd LimitNPROC with private users regression
Long story short recursively enforcing RLIMIT_NPROC when it is not
enforced on the process that creates a new user namespace, causes
currently working code to fail.  There is no reason to enforce
RLIMIT_NPROC recursively when we don't enforce it normally so update
the code to detect this case.

I would like to simply use capable(CAP_SYS_RESOURCE) to detect when
RLIMIT_NPROC is not enforced upon the caller.  Unfortunately because
RLIMIT_NPROC is charged and checked for enforcement based upon the
real uid, using capable() which is euid based is inconsistent with reality.
Come as close as possible to testing for capable(CAP_SYS_RESOURCE) by
testing for when the real uid would match the conditions when
CAP_SYS_RESOURCE would be present if the real uid was the effective
uid.

Reported-by: Etienne Dechamps <etienne@edechamps.fr>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=215596
Link: https://lkml.kernel.org/r/e9589141-cfeb-90cd-2d0e-83a62787239a@edechamps.fr
Link: https://lkml.kernel.org/r/87sfs8jmpz.fsf_-_@email.froward.int.ebiederm.org
Cc: stable@vger.kernel.org
Fixes: 21d1c5e386 ("Reimplement RLIMIT_NPROC on top of ucounts")
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2022-02-25 10:40:14 -06:00
Arnd Bergmann
a1c57d7e77 AT91 defconfig #1 for 5.18:
- sama7 additions for NAND flash, crypto, cpuidle and cpufreq
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Merge tag 'at91-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig

AT91 defconfig #1 for 5.18:

- sama7 additions for NAND flash, crypto, cpuidle and cpufreq

* tag 'at91-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: configs: at91: sama7: add config for cpufreq
  ARM: configs: at91: sama7: enable cpu idle
  ARM: configs: at91: sama7: Enable crypto IPs and software algs
  ARM: configs: at91: sama7: Enable UBIFS_FS
  ARM: configs: at91: sama7: Enable NAND / SMC

Link: https://lore.kernel.org/r/20220225113220.51401-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:22:20 +01:00
Arnd Bergmann
32d748a03e i.MX defconfig change for 5.18:
- Add a new defconfig for Cortex-M based i.MXRT family.
 - A series from Marcel Ziswiler to rebuild arm64 defconfig with
   'savedefconfig', and then enable various relevant options needed by
   Toradex verdin-imx8mm device.
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Merge tag 'imx-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig change for 5.18:

- Add a new defconfig for Cortex-M based i.MXRT family.
- A series from Marcel Ziswiler to rebuild arm64 defconfig with
  'savedefconfig', and then enable various relevant options needed by
  Toradex verdin-imx8mm device.

* tag 'imx-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: defconfig: enable verdin-imx8mm relevant drivers as modules
  arm64: defconfig: build r8169 as a module
  arm64: defconfig: build imx-sdma as a module
  arm64: defconfig: enable imx8m pcie phy driver
  arm64: defconfig: enable bpf/cgroup firewalling
  arm64: defconfig: rebuild default configuration
  arm64: defconfig: re-order default configuration
  arm64: defconfig: enable pcieaer configuration
  arm64: defconfig: enable taskstats configuration
  ARM: imxrt_defconfig: Add i.MXRT family defconfig

Link: https://lore.kernel.org/r/20220222075226.160187-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:20:35 +01:00
Arnd Bergmann
707e0a4235 ARM64 defconfig changes for TI K3 platforms for v5.17 merge window:
- Enable drivers for USB and SERDES IPs on TI K3 SoC
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Merge tag 'ti-k3-config-for-v5.17-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/defconfig

ARM64 defconfig changes for TI K3 platforms for v5.17 merge window:

- Enable drivers for USB and SERDES IPs on TI K3 SoC

* tag 'ti-k3-config-for-v5.17-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  arm64: defconfig: Enable USB controller drivers for TI K3 SoC

Link: https://lore.kernel.org/r/20211223094040.15349-1-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:20:12 +01:00
Christophe JAILLET
fba09099c6 media: v4l2-pci-skeleton: Remove usage of the deprecated "pci-dma-compat.h" API
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.

Some reasons why this API should be removed have been given by Julia
Lawall in [2].

A coccinelle script has been used to perform the needed transformation.
It can be found in [3].

[1]: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
[2]: https://lore.kernel.org/kernel-janitors/alpine.DEB.2.22.394.2007120902170.2424@hadrien/
[3]: https://lore.kernel.org/kernel-janitors/20200716192821.321233-1-christophe.jaillet@wanadoo.fr/

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2022-02-25 17:19:21 +01:00
Christophe JAILLET
8c155674d9 rapidio/tsi721: Remove usage of the deprecated "pci-dma-compat.h" API
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.

Some reasons why this API should be removed have been given by Julia
Lawall in [2].

A coccinelle script has been used to perform the needed transformation.
It can be found in [3].

[1]: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
[2]: https://lore.kernel.org/kernel-janitors/alpine.DEB.2.22.394.2007120902170.2424@hadrien/
[3]: https://lore.kernel.org/kernel-janitors/20200716192821.321233-1-christophe.jaillet@wanadoo.fr/

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2022-02-25 17:19:21 +01:00
Christophe JAILLET
0fb3436b4b sparc: Remove usage of the deprecated "pci-dma-compat.h" API
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.

Some reasons why this API should be removed have been given by Julia
Lawall in [2].

A coccinelle script has been used to perform the needed transformation.
It can be found in [3].

[1]: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
[2]: https://lore.kernel.org/kernel-janitors/alpine.DEB.2.22.394.2007120902170.2424@hadrien/
[3]: https://lore.kernel.org/kernel-janitors/20200716192821.321233-1-christophe.jaillet@wanadoo.fr/

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2022-02-25 17:19:21 +01:00
Christophe JAILLET
ffecba83be agp/intel: Remove usage of the deprecated "pci-dma-compat.h" API
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.

Some reasons why this API should be removed have been given by Julia
Lawall in [2].

A coccinelle script has been used to perform the needed transformation.
It can be found in [3].

[1]: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
[2]: https://lore.kernel.org/kernel-janitors/alpine.DEB.2.22.394.2007120902170.2424@hadrien/
[3]: https://lore.kernel.org/kernel-janitors/20200716192821.321233-1-christophe.jaillet@wanadoo.fr/

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2022-02-25 17:19:21 +01:00
Christophe JAILLET
06cc5cf165 alpha: Remove usage of the deprecated "pci-dma-compat.h" API
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.

Some reasons why this API should be removed have been given by Julia
Lawall in [2].

A coccinelle script has been used to perform the needed transformation.
It can be found in [3].

[1]: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
[2]: https://lore.kernel.org/kernel-janitors/alpine.DEB.2.22.394.2007120902170.2424@hadrien/
[3]: https://lore.kernel.org/kernel-janitors/20200716192821.321233-1-christophe.jaillet@wanadoo.fr/

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2022-02-25 17:19:20 +01:00
Arnd Bergmann
ab930ecfce Samsung clock controller changes for v5.18
Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC
 clock controller drivers.  The Tesla FSD's clock controller is similar
 to Samsung Exynos one, so entire driver structure can be re-used.
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Merge tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung clock controller changes for v5.18

Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC
clock controller drivers.  The Tesla FSD's clock controller is similar
to Samsung Exynos one, so entire driver structure can be re-used.

* tag 'samsung-clk-fsd-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: fix missing Tesla FSD dependency on Exynos
  clk: samsung: fsd: Add cam_csi block clock information
  clk: samsung: fsd: Add cmu_mfc block clock information
  clk: samsung: fsd: Add cmu_imem block clock information
  clk: samsung: fsd: Add cmu_fsys1 clock information
  clk: samsung: fsd: Add cmu_fsys0 clock information
  clk: samsung: fsd: Add cmu_peric block clock information
  clk: samsung: fsd: Add initial clock support
  dt-bindings: clock: Document FSD CMU bindings
  dt-bindings: clock: Add bindings definitions for FSD CMU blocks

Link: https://lore.kernel.org/r/20220204154112.133723-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:14:16 +01:00
Michael Walle
3c552889e4 mtd: spi-nor: renumber flags
As we have deleted some flag, lets renumber them so there are no holes.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-33-michael@walle.cc
2022-02-25 18:13:20 +02:00
Michael Walle
e9d663a2a0 mtd: spi-nor: slightly change code style in spi_nor_sr_ready()
Now that there is almost no special case code left in
spi_nor_sr_ready(), the return check looks odd. Move the function call
closer to the return code checking.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-32-michael@walle.cc
2022-02-25 18:13:13 +02:00
Michael Walle
e8fd3b4b26 mtd: spi-nor: spansion: rename vendor specific functions and defines
Drop the generic spi_nor prefix for all the spansion functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-31-michael@walle.cc
2022-02-25 18:13:01 +02:00
Michael Walle
51c55506a7 mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag
Now that all functions using that flag are local to the spansion module,
we can convert the flag to a manufacturer one.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-30-michael@walle.cc
2022-02-25 18:12:56 +02:00
Michael Walle
837d5181be mtd: spi-nor: move all spansion specifics into spansion.c
The clear status register flags is only available on spansion flashes.
Move all the functions around that into the spanion module.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-29-michael@walle.cc
2022-02-25 18:12:49 +02:00
Michael Walle
6235ff040c mtd: spi-nor: spansion: slightly rework control flow in late_init()
Don't return early when the flash is smaller than or equal to 16MiB. We
need to be able to register hooks for all sizes of flashes. This also has
the benefit that it increases the readability of the code because the
action, i.e. registering the fixups, is connected to the condition, i.e.
flashes larger than 16MiB.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-28-michael@walle.cc
2022-02-25 18:12:42 +02:00
Michael Walle
2b18a18ea7 mtd: spi-nor: micron-st: rename vendor specific functions and defines
Drop the generic spi_nor prefix for all the micron-st functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-27-michael@walle.cc
2022-02-25 18:12:35 +02:00
Michael Walle
8f938262a6 mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag
Now that all functions using that flag are local to the micron module,
we can convert the flag to a manufacturer one.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-26-michael@walle.cc
2022-02-25 18:12:28 +02:00
Michael Walle
c770abe52d mtd: spi-nor: move all micron-st specifics into micron-st.c
The flag status register is only available on micron flashes. Move all
the functions around that into the micron module.

This is almost a mechanical move except for the spi_nor_fsr_ready()
which now also checks the normal status register. Previously, this was
done in spi_nor_ready().

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-25-michael@walle.cc
2022-02-25 18:12:19 +02:00
Michael Walle
56b852e863 mtd: spi-nor: xilinx: correct the debug message
XRDSR is a combination of xilinx and the RDSR opcode, but the register
is just the status register. Correct the debug message.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-24-michael@walle.cc
2022-02-25 18:12:12 +02:00
Michael Walle
8b7a2e00d1 mtd: spi-nor: xilinx: rename vendor specific functions and defines
Drop the generic spi_nor prefix for all the xilinx functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-23-michael@walle.cc
2022-02-25 18:12:06 +02:00
Michael Walle
8b4195cd6d mtd: spi-nor: move all xilinx specifics into xilinx.c
Mechanically move all the xilinx functions to its own module.

Then register the new flash specific ready() function.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-22-michael@walle.cc
2022-02-25 18:12:01 +02:00
Michael Walle
9fb4beb1b0 mtd: spi-nor: guard _page_size parameter in S3AN_INFO()
The _page_size marco parameter was missing parentheses around it. Add
them.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-21-michael@walle.cc
2022-02-25 18:11:54 +02:00
Michael Walle
66cf87c600 mtd: spi-nor: export more functions to be used in vendor modules
We will move vendor specific code into the vendor modules and thus we
will have to export these functions so they can be called.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-20-michael@walle.cc
2022-02-25 18:11:23 +02:00
Michael Walle
4cf1c7bdc5 mtd: spi-nor: allow a flash to define its own ready() function
Xilinx and Micron flashes have their own implementation of the
spi_nor_ready() function. At the moment, the core will figure out
which one to call according to some flags. Lay the foundation to
make it possible that a flash can register its own ready()
function.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-19-michael@walle.cc
2022-02-25 18:11:17 +02:00
Michael Walle
b44aa9ac6b mtd: spi-nor: slightly refactor the spi_nor_setup()
Instead of always using a function pointer (and initializing it to our
default), just call the default function if the flash didn't set its own
one. That will make the call flow easier to follow.

Also mark the parameter as optional now.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-18-michael@walle.cc
2022-02-25 18:11:11 +02:00
Jagan Teki
80253168db
drm: of: Lookup if child node has panel or bridge
Devices can also be child nodes when we also control that device
through the upstream device (ie, MIPI-DCS for a MIPI-DSI device).

drm_of_find_panel_or_bridge can lookup panel or bridge for a given
device has port and endpoint and it fails to lookup if the device
has a child nodes.

This patch add support to lookup for a child node of the given parent
that isn't either port or ports.

Example OF graph representation of DSI host, which has port but
not has ports and has child panel node.

dsi {
	compatible = "allwinner,sun6i-a31-mipi-dsi";
	#address-cells = <1>;
	#size-cells = <0>;

	port {
		dsi_in_tcon0: endpoint {
			remote-endpoint = <tcon0_out_dsi>;
	};

	panel@0 {
		reg = <0>;
	};
};

Example OF graph representation of DSI host, which has ports but
not has port and has child panel node.

dsi {
        compatible = "samsung,exynos5433-mipi-dsi";
        #address-cells = <1>;
        #size-cells = <0>;

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

                	dsi_to_mic: endpoint {
                        	remote-endpoint = <&mic_to_dsi>;
                	};
                };
        };

        panel@0 {
                reg = <0>;
        };
};

Example OF graph representation of DSI host, which has neither a port
nor a ports but has child panel node.

dsi0 {
	compatible = "ste,mcde-dsi";
	#address-cells = <1>;
	#size-cells = <0>;

	panel@0 {
		reg = <0>;
	};
};

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220202160414.16493-1-jagan@amarulasolutions.com
2022-02-25 17:08:37 +01:00
Arnd Bergmann
877d1d8112 STM32 DT for v5.18, round 1
Highlights:
 ----------
 
 -MCU:
  -Fix W=1 warnings for timers (duplicate unit-address) for F4 and F7 series.
  -Enable DMA2D on f469 disco.
 
 - MPU:
  -General:
   - Add new board support: emSBS-Argon.
   - Add dma configuration for all U(S)ART nodes and disable them in board files
     when they are not needed in stm32mp15.
   - Correct GIC PPI interrupts on stm32mp15 and stm32mp13.
 
 - ST boards:
   - Add EXTI support on stm32mp13
   - Add DMA, MDMA and DMAmux support to stm32mp13 (iso feature than MP15)
   - Update SDMMC1/2 support on stm32mp13: sleep config, update version to v2.2,
     update the max frequency to 130 MHz.
 
 - DH boards:
   - Enable rproc to control the CM4 and IPCC mailbox to interact with it.
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Merge tag 'stm32-dt-for-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT for v5.18, round 1

Highlights:
----------

-MCU:
 -Fix W=1 warnings for timers (duplicate unit-address) for F4 and F7 series.
 -Enable DMA2D on f469 disco.

- MPU:
 -General:
  - Add new board support: emSBS-Argon.
  - Add dma configuration for all U(S)ART nodes and disable them in board files
    when they are not needed in stm32mp15.
  - Correct GIC PPI interrupts on stm32mp15 and stm32mp13.

- ST boards:
  - Add EXTI support on stm32mp13
  - Add DMA, MDMA and DMAmux support to stm32mp13 (iso feature than MP15)
  - Update SDMMC1/2 support on stm32mp13: sleep config, update version to v2.2,
    update the max frequency to 130 MHz.

- DH boards:
  - Enable rproc to control the CM4 and IPCC mailbox to interact with it.

* tag 'stm32-dt-for-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (43 commits)
  ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
  ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13
  ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f7 series
  ARM: dts: stm32: remove some timer duplicate unit-address on stm32f7 series
  ARM: dts: stm32: Enable EXTI on stm32mp13
  ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcor-avenger96
  ARM: dts: stm32: keep uart4 behavior on stm32mp15xx-dhcom-som
  ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-picoitx
  ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-pdk2
  ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-drc02
  ARM: dts: stm32: keep uart4 behavior on stm32mp157c-odyssey
  ARM: dts: stm32: keep uart4 behavior on stm32mp157c-lxa-mc1
  ARM: dts: stm32: keep uart nodes behavior on stm32mp157a-stinger96
  ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0
  ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0-of7
  ARM: dts: stm32: keep uart4 behavior on stm32mp157a-iot-box
  ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-edimm2.2
  ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-ctouch2
  ARM: dts: stm32: keep uart4 and uart7 behavior on stm32mp15xx-dkx
  ARM: dts: stm32: keep uart4 behavior on stm32mp157c-ed1
  ...

Link: https://lore.kernel.org/r/893924a9-bcc4-9fa9-4f8e-7f56e77f6854@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:07:54 +01:00
Arnd Bergmann
581a1f8c9a Compatible for the rk3568-usb2phy-grf.
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Merge tag 'v5.18-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Compatible for the rk3568-usb2phy-grf.

* tag 'v5.18-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: soc: rockchip: add rk3568-usb2phy-grf

Link: https://lore.kernel.org/r/9977257.a15B8eIVjX@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:06:48 +01:00
Arnd Bergmann
b610c55bdf Arm SCMI firmware interface updates for v5.18
Few main additions include:
 - Support for OPTEE based SCMI transport to enable using SCMI service
   provided by OPTEE on some platforms
 - Support for atomic SCMI transports which enables few SCMI transactions
   to be completed in atomic context. This involves other refactoring work
   associated with it. It also marks SMC and OPTEE as atomic transport as
   the commands are completed once the return.
 - Support for polling mode in SCMI VirtIO transport in order to support
   atomic operations
 - Support for atomic clock operations based on availability of atomic
   capability in the underlying SCMI transport
 
 Other changes involves some trace and log enhancements and miscellaneous
 bug fixes.
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Merge tag 'scmi-updates-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers

Arm SCMI firmware interface updates for v5.18

Few main additions include:
- Support for OPTEE based SCMI transport to enable using SCMI service
  provided by OPTEE on some platforms
- Support for atomic SCMI transports which enables few SCMI transactions
  to be completed in atomic context. This involves other refactoring work
  associated with it. It also marks SMC and OPTEE as atomic transport as
  the commands are completed once the return.
- Support for polling mode in SCMI VirtIO transport in order to support
  atomic operations
- Support for atomic clock operations based on availability of atomic
  capability in the underlying SCMI transport

Other changes involves some trace and log enhancements and miscellaneous
bug fixes.

* tag 'scmi-updates-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: (28 commits)
  clk: scmi: Support atomic clock enable/disable API
  firmware: arm_scmi: Add support for clock_enable_latency
  firmware: arm_scmi: Add atomic support to clock protocol
  firmware: arm_scmi: Support optional system wide atomic-threshold-us
  dt-bindings: firmware: arm,scmi: Add atomic-threshold-us optional property
  firmware: arm_scmi: Add atomic mode support to virtio transport
  firmware: arm_scmi: Review virtio free_list handling
  firmware: arm_scmi: Add a virtio channel refcount
  firmware: arm_scmi: Disable ftrace for Clang Thumb2 builds
  firmware: arm_scmi: Add new parameter to mark_txdone
  firmware: arm_scmi: Add atomic mode support to smc transport
  firmware: arm_scmi: Add support for atomic transports
  firmware: arm_scmi: Make optee support sync_cmds_completed_on_ret
  firmware: arm_scmi: Make smc support sync_cmds_completed_on_ret
  firmware: arm_scmi: Add sync_cmds_completed_on_ret transport flag
  firmware: arm_scmi: Make smc transport use common completions
  firmware: arm_scmi: Add configurable polling mode for transports
  firmware: arm_scmi: Use new trace event scmi_xfer_response_wait
  include: trace: Add new scmi_xfer_response_wait event
  firmware: arm_scmi: Refactor message response path
  ...

Link: https://lore.kernel.org/r/20220222201742.3338589-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:05:31 +01:00
Arnd Bergmann
c8812c2a08 i.MX drivers update for 5.18:
- Drop LS1021A device check from soc-imx driver as it's unneeded since
   commit commit 4ebd29f916 ("soc: imx: Register SoC device only on
   i.MX boards").
 - Add support for power domains provided by the VPU blk-ctrl on the
   i.MX8MQ.
 - Add resource owner management API which will be used to check whether
   M4 is under control of Linux.
 - Add VPU MU resources support into SCU power domain driver.
 - Support DT overlay for WEIM bus driver with OF reconfiguration
   notifier handler.
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Merge tag 'imx-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.18:

- Drop LS1021A device check from soc-imx driver as it's unneeded since
  commit commit 4ebd29f916 ("soc: imx: Register SoC device only on
  i.MX boards").
- Add support for power domains provided by the VPU blk-ctrl on the
  i.MX8MQ.
- Add resource owner management API which will be used to check whether
  M4 is under control of Linux.
- Add VPU MU resources support into SCU power domain driver.
- Support DT overlay for WEIM bus driver with OF reconfiguration
  notifier handler.

* tag 'imx-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  bus: imx-weim: add DT overlay support for WEIM bus
  firmware: imx: scu-pd: imx8q: add vpu mu resources
  firmware: imx: add get resource owner api
  soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl
  dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains
  soc: imx: Remove Layerscape check

Link: https://lore.kernel.org/r/20220222075226.160187-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:05:21 +01:00
Arnd Bergmann
25b67f373b TEE shared memory cleanup for v5.18
- The TEE shared memory pool based on two pools is replaced with a single
   somewhat more capable pool.
 - Replaces tee_shm_alloc() and tee_shm_register() with new functions
   easier to use and maintain.  The TEE subsystem and the TEE drivers are
   updated to use the new functions instead.
 - The TEE based Trusted keys routines are updated to use the new
   simplified functions above.
 - The OP-TEE based rng driver is updated to use the new simplified
   functions above.
 - The TEE_SHM-flags are refactored to better match their usage
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Merge tag 'tee-shm-for-v5.18' of git://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers

TEE shared memory cleanup for v5.18

- The TEE shared memory pool based on two pools is replaced with a single
  somewhat more capable pool.
- Replaces tee_shm_alloc() and tee_shm_register() with new functions
  easier to use and maintain.  The TEE subsystem and the TEE drivers are
  updated to use the new functions instead.
- The TEE based Trusted keys routines are updated to use the new
  simplified functions above.
- The OP-TEE based rng driver is updated to use the new simplified
  functions above.
- The TEE_SHM-flags are refactored to better match their usage

* tag 'tee-shm-for-v5.18' of git://git.linaro.org:/people/jens.wiklander/linux-tee:
  tee: refactor TEE_SHM_* flags
  tee: replace tee_shm_register()
  KEYS: trusted: tee: use tee_shm_register_kernel_buf()
  tee: add tee_shm_register_{user,kernel}_buf()
  optee: add optee_pool_op_free_helper()
  tee: replace tee_shm_alloc()
  tee: simplify shm pool handling
  tee: add tee_shm_alloc_user_buf()
  tee: remove unused tee_shm_pool_alloc_res_mem()
  hwrng: optee-rng: use tee_shm_alloc_kernel_buf()
  optee: use driver internal tee_context for some rpc

Link: https://lore.kernel.org/r/20220218184802.GA968155@jade
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:05:11 +01:00
Arnd Bergmann
bc5ede20b8 Small simplification in AMDTE driver
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Merge tag 'amdtee-for-v5.18' of git://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers

Small simplification in AMDTE driver

* tag 'amdtee-for-v5.18' of git://git.linaro.org:/people/jens.wiklander/linux-tee:
  tee: amdtee: Make use of the helper macro LIST_HEAD()

Link: https://lore.kernel.org/r/20220218175632.GA926082@jade
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:05:01 +01:00
Arnd Bergmann
f289f1d8a4 Renesas driver updates for v5.18 (take two)
- RZ/G2L and RZ/V2L need PM and PM_GENERIC_DOMAINS,
   - Introduce ARCH_RZG2L family for RZ/G2L, RZ/G2LC, RZ/G2UL and RZ/V2L
     SoCs.
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Merge tag 'renesas-drivers-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.18 (take two)

  - RZ/G2L and RZ/V2L need PM and PM_GENERIC_DOMAINS,
  - Introduce ARCH_RZG2L family for RZ/G2L, RZ/G2LC, RZ/G2UL and RZ/V2L
    SoCs.

* tag 'renesas-drivers-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Kconfig: Introduce ARCH_RZG2L config option
  soc: renesas: Kconfig: Explicitly select PM and PM_GENERIC_DOMAINS configs

Link: https://lore.kernel.org/r/cover.1645784470.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:04:50 +01:00
Arnd Bergmann
15cc8d030c Renesas driver updates for v5.18
- Initial support for the new RZ/V2L SoC,
   - RZ/G2L product revision support.
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Merge tag 'renesas-drivers-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.18

  - Initial support for the new RZ/V2L SoC,
  - RZ/G2L product revision support.

* tag 'renesas-drivers-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Add support for reading product revision for RZ/G2L family
  soc: renesas: Identify RZ/V2L SoC

Link: https://lore.kernel.org/r/cover.1644587208.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:04:24 +01:00
Rob Clark
9e4dde28e9 drm/msm: Avoid dirtyfb stalls on video mode displays (v2)
Someone on IRC once asked an innocent enough sounding question:  Why
with xf86-video-modesetting is es2gears limited at 120fps.

So I broke out the perfetto tracing mesa MR and took a look.  It turns
out the problem was drm_atomic_helper_dirtyfb(), which would end up
waiting for vblank.. es2gears would rapidly push two frames to Xorg,
which would blit them to screen and in idle hook (I assume) call the
DIRTYFB ioctl.  Which in turn would do an atomic update to flush the
dirty rects, which would stall until the next vblank.  And then the
whole process would repeat.

But this is a bit silly, we only need dirtyfb for command mode DSI
panels.  So track in plane state whether dirtyfb is required, and
track in the fb how many attached planes require dirtyfb so that we
can skip it when not required.  (Note, mdp4 does not actually have
cmd mode support.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220223191118.881321-1-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-02-25 07:59:58 -08:00