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1,105,074 commits
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f6a9a2d64d |
USB: core: Update kerneldoc for usb_get_dev() and usb_get_intf()
The kerneldoc for usb_get_dev() and usb_get_intf() says that drivers should always refcount the references they hold for the usb_device or usb_interface structure, respectively. But this is an overstatement: In many cases drivers do not access these references after they have been unbound, and in such cases refcounting is unnecessary. This patch updates the kerneldoc for the two routines, explaining when a driver does not need to increment and decrement the refcount. This should help dispel misconceptions which might otherwise afflict programmers new to the USB subsystem. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Link: https://lore.kernel.org/r/Yhjp4Rp9Alipmwtq@rowland.harvard.edu Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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c253bf70c6 |
NXP/FSL SoC driver fixes for v5.17
- Add missing SoC compatible in existing binding
- Replace kernel.h with the necessary inclusions
- MAINTAINERS file fixes
- Fix memory allocation failure check in guts driver
- Various cleanups and minor fixes
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Merge tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes
NXP/FSL SoC driver fixes for v5.17
- Add missing SoC compatible in existing binding
- Replace kernel.h with the necessary inclusions
- MAINTAINERS file fixes
- Fix memory allocation failure check in guts driver
- Various cleanups and minor fixes
* tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: qe: Check of ioremap return value
soc: fsl: qe: fix typo in a comment
soc: fsl: guts: Add a missing memory allocation failure check
soc: fsl: guts: Revert commit
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5debe5bfa0 |
list: test: Add a test for list_entry_is_head()
The list_entry_is_head() macro was added[1] after the list KUnit tests, so wasn't tested. Add a new KUnit test to complete the set. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e130816164e244b692921de49771eeb28205152d Signed-off-by: David Gow <davidgow@google.com> Acked-by: Daniel Latypov <dlatypov@google.com> Acked-by: Brendan Higgins <brendanhiggins@google.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org> |
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37dc573c0a |
list: test: Add a test for list_is_head()
list_is_head() was added recently[1], and didn't have a KUnit test. The implementation is trivial, so it's not a particularly exciting test, but it'd be nice to get back to full coverage of the list functions. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/include/linux/list.h?id=0425473037db40d9e322631f2d4dc6ef51f97e88 Signed-off-by: David Gow <davidgow@google.com> Acked-by: Daniel Latypov <dlatypov@google.com> Acked-by: Brendan Higgins <brendanhiggins@google.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org> |
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d7fd696c12 |
list: test: Add test for list_del_init_careful()
The list_del_init_careful() function was added[1] after the list KUnit test. Add a very basic test to cover it. Note that this test only covers the single-threaded behaviour (which matches list_del_init()), as is already the case with the test for list_empty_careful(). [1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c6fe44d96fc1536af5b11cd859686453d1b7bfd1 Signed-off-by: David Gow <davidgow@google.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org> |
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4036b29a14 |
ARM: mmp: Fix failure to remove sram device
Make sure in .probe() to set driver data before the function is left to make it possible in .remove() to undo the actions done. This fixes a potential memory leak and stops returning an error code in .remove() that is ignored by the driver core anyhow. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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022e5220f2 |
AT91 & POLARFIRE SoC #1 for 5.18:
- sama7g5: CPU idle support with CPUFreq operating points defined in DT - polarfire: addition of the soc system controller -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYhjItwAKCRAfOrpwrNPN DDLmAP9CKK9j0y3YEs69vXYO4URTc5FrpRdZ976mHZdvl5ZJpQD/SK8k/AZhVwsV OUMN8zosXY0TiCRjsaLPq6MK9Nv09QA= =alh4 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY9zUACgkQmmx57+YA GNltxA/+KgPQWmNQ3sPfkGq+rbCMof3misxS41OL64VUyT7VFau9nZeyJ7m8Vc4X CudkmTO39IgYLOcy6l51Pq8zeZ8jcMEQPntFo6fQUimo5slZQBNVuHnnCiWjpUdh eOQe5KwQb9fHPW/vMN0zKafckkVQXELo88ol54SorHqDwK/LU/s8iYYsUXByMJoa mxrZvg8/pXmQ+yyo1lpID0VfN+nWmOq4LVwSniF7z88M+J/H6R/A+KLqOoEyKvUN 1wawBdKHqmH/BftMnGP6oqFVFeOgH4BhMLPMSLp09rO5isx6vgPhWXvGh0PfL/+9 hUaOE+Hr7j33Yuxow97opx/Q0z+pqT0nyENq7/3cZpzB8V+WVJNFQeZ4Pm2A5jis NLRhm+V9gnRd8usZeepa8uvywo1aZHE2T14VcFffSPqgkOONyDj0V7DEP3gfZicA ezYIbUFHqU2hVsEmnxzXNDrvdUmI3yv77mK+1QXE3HBdd8DLDzpNOdzXED1ENf9p j2vBUX4XCiQVxSBbhA8ILKEh+xCUHDh6ZUMnMzQwy4hxa2RPfFPscr+m/YURDb8A EIfvG0qtBIe/CsVrD8XfhBTyewhFQKWxYUSDz0nl9OWhr3+Q/6yxJSSvAQoD40tS rYuS6JFDIJdB+wjt2Q6adR4xpCnEkfDL8ysWiYPMnTQ/mnmu2hg= =VBoe -----END PGP SIGNATURE----- Merge tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 & POLARFIRE SoC #1 for 5.18: - sama7g5: CPU idle support with CPUFreq operating points defined in DT - polarfire: addition of the soc system controller * tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: soc: add microchip polarfire soc system controller ARM: at91: Kconfig: select PM_OPP ARM: at91: PM: add cpu idle support for sama7g5 ARM: at91: ddr: fix typo to align with datasheet naming ARM: at91: ddr: align macro definitions ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency Link: https://lore.kernel.org/r/20220225121943.71494-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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16018c0d27 |
ARM: mstar: Select ARM_ERRATA_814220
All of the SoCs that are supported so far are Cortex A7 r0p5. So it seems like this errata is present. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Romain Perier <romain.perier@gmail.com> Link: https://lore.kernel.org/r/20220223064807.261878-1-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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183fc8344d |
i.MX SoC update for 5.18:
- Add initial support for i.MXRT10xx family which features NXP's implementation of the Arm Cortex-M7 core and in some case the Arm Cortex-M4 core too. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUVkYUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7IMwf/ch9nwSrW6lLdypPqQzs80fd7JVtx kZFeHrjxePtP2fhcPhT9PcJW5nBDmGkoxpuwbfTFjvm/UxMcBVIYfShk6Rposrcv hhnnCA3gx1bdnGVYTTv3d/5fAXVUoIbE8UsWLM1eOrJ7KNbevpC5353cuQNytTSp +P+wt2hHweuTDmvPRmDY6QJndM6rBwKqZ5a7Rd5pqRzGs7mMwr5cMvWMjecM50Ni FOQYt3YmLClQXyHBBhHBog72JVkNw65NR80o/bhdDIAXwXFqReABnToWFmoS+jwd jWif4Ibhq7DNNfxt+HRMT6mwHOViDl6VxzPZ0TvGnULb1YohMuwPmeM7cw== =kPTp -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY9vAACgkQmmx57+YA GNnwshAAlfT3kDGwTXSKhwDtoFB+4hD6iiQfM0bO9sRoNES/LoyJEMD/RrZmB1Yv ZdZr3ghDPrNUHqOzhDNLnKznE+cVOPQgcE8LgoQxOspHpSN7YvCsh2nsgzWQyzQG LkRCdHEbqiVpmGSaNPsicvVfHTIAqwBkO+ToJw1mJ/6o1Fz31Ll4Qjy3LqbcIsNW 84T2TkWZRTAGY9XKKMTJkvCZ5IVhsNtlJNM+1lMs+UvoERORpOPcYoTSjQW3ALX9 OtgOBM0u6NOeuaUX0l5MZDNurHze0D7l8QMeUSeRUnQF8KCXxnV2tS1hAh2JMD1k 8N0xmd0KB0+/OBEGF4AXTHj8anL7gQMUZxEM/geMHezlfSU8gJJ21tweRUFJRKD4 EcUCsIOrEjnhdztOznYNzpz4NrsgoZuRkRfTOpnbn+inhRmhFbp0g55wsdjtAFUg TYzDN6amrj6FdjHHJDQ0X6NGkkpM5Wu2bS3RrZuiuaKerw2Ulyyv3bOJ/9Dv+H0t V+yLECGAMW9qeYw2cD3ZxiRjD+3dqV7BrpUMLljKUcApVf0uGoRaHALxHwT70HSu h3GpINmM751dcxPbNi6BJFi6TH7v+58ulsF+nZERyE+NA5UIUip0pnDeQlOQzJTZ lt+1Cjz6zSe3OduKrbRgc61CfcAUWU7Lpwep0RC3gM3XofktWFU= =tki8 -----END PGP SIGNATURE----- Merge tag 'imx-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC update for 5.18: - Add initial support for i.MXRT10xx family which features NXP's implementation of the Arm Cortex-M7 core and in some case the Arm Cortex-M4 core too. * tag 'imx-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: Add initial support for i.MXRT10xx family Link: https://lore.kernel.org/r/20220222075226.160187-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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543f7961c2 |
This cleans out the remaining board files from IXP4xx and
makes it an exclusive device tree subarchitecture without any special weirdness in arch/arm/mach-ixp4xx. The biggest noticeable change is the removal of the old PCI driver and along with that the removal of the special DMA coherency code and defines and the DMA bouncing. I tried to convert the IXP4xx to multiplatform on top of this but it didn't work because IXP4xx wants to be big endian and multiplatform config creates a problem like this: ../arch/arm/kernel/head.S: Assembler messages: ../arch/arm/kernel/head.S:94: Error: selected processor does not support `setend be' in ARM mode I think this is because MULTI_V5 turns on CPUs that cannot do big endian, and IXP4xx turn on big endian. (It crashes if I try to boot in little endian mode, sorry. It really wants to run big endian.) But before fixing multiplatform we can fix all of this! The networking patches are dependencies so I am requesting ACKs from the network maintainers on these. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmIH7KsACgkQQRCzN7AZ XXNGDQ//dfQIiKC0uE4UEbKeDG18c1NpSDHomQQ/xGjnl9nenmOzsqg9pu+hrD+y eHNp55PmL8WKjXYV8wrbQd65BsnMGpiIh4CoT17BOM0vjQ7+l0KM9FqCuYTIXkyE +AR8ZbOYZDSNZA6bKCy8dT1tYZakx2IK02YEphiAU2hPsvWYTE2VTDSYzskbW7pu +aaCzPOnteQZM4cRMPDOmhq9FedaCnluom9ldTei0nEkFuDi0v947zUVs8M3o7gi rsZBRxfXlY86G3b8WdqL0jCcrsWsnLnP6TehSH7r/TbsFlzdv+GQpfZ8craDpTTW X5zhUQYreAYNY88Vy1UoVSci6BSJF/c8Q75lcLOcIuf/XX6ufyTO1YHDXxxSm04P 1cjunZzJs/YGx2dDgVfzSIXTBCMKovZcUVI5FfEP36wW3RA1WSa4cdWnI9alwlp4 yX7AtOtbxIZ2jiNQMV4qx9Yz8SzlVWF7E63S16XAiFWr8BQex1Lmh2u5BZLE03XW k9yl+dhqmTf+MlHS7y70KdwxY0XvJNZiHoCEIA2A0B7ayvl9ThkXOWOkYBZLb0hq SmlIHJkRyFLNxtVTvadq3S8fa1haS9qTONwfS7KCkCPp8XpE4QCDCEAOK9EK0tCS p4SRGKD6SpoqEZKVItacGfLLAjJeGt6kIDBdRJ0J/nASVgcvaT8= =DMVU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY9nQACgkQmmx57+YA GNkM8RAAqwYUKHl1pkAnTBU60aW9dWJpNdyIej22sdi+FcsGcF4tC/RQ+Zssl0VD eMvAM295eGZDb02B0f8EbPQHuDEp7Y9mpC+9QjoBCLCojho15ise3cKmyloG9/7T xo1J99lY/PW7ociVXqO4rZtWsplgy+FB3X+cCsk/UziwsF+HqjSSOi9VsEkHsBHI sJwDE90YetuC3S2+5/G9z2JbuqNchGebT66ZE13CGGBLb1cKBNMb2L1ZjwRlbhUK tYPBaTBnwJApLKoTQx4HlpAei5XROEB/3qxPH4e4RnW8MZyG7+ZNXnkIuZytJxVc zt5Qols2bLakHms0QdZhpeinvqPV4c88xGCZryQRHqbU1VLfygFFuoqnDfn/l0vW KWceaSMeL5EpvE+1sZsP7EcQn5AhCKckWoaL3TRJzeR/0JJswgBMMSBYof/eSP4u jJX+NBid6Hjred7B12QBFYc7L3LCDcmFmQM9LYa7IciedRx3fqw9yNRXzBVgTUDC t/cuLn06uLYTbn5fNnxxRvvDkLnXtf8OyzER0fy+Dm+terjIMATK3iQ0bGvwj46Y sQ74A7mQ+tsosmS+SEz79VD3AuzCqm3nfFTeU8W0QUj3IK1zqWKEjmJpeeniuL8L QBP7ZR8wlytfwq4fm2gI3wss1gFw8GYcJlkPhBAuHjMisiFWl10= =blMU -----END PGP SIGNATURE----- Merge tag 'ixp4xx-cleanup-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc This cleans out the remaining board files from IXP4xx and makes it an exclusive device tree subarchitecture without any special weirdness in arch/arm/mach-ixp4xx. The biggest noticeable change is the removal of the old PCI driver and along with that the removal of the special DMA coherency code and defines and the DMA bouncing. I tried to convert the IXP4xx to multiplatform on top of this but it didn't work because IXP4xx wants to be big endian and multiplatform config creates a problem like this: ../arch/arm/kernel/head.S: Assembler messages: ../arch/arm/kernel/head.S:94: Error: selected processor does not support `setend be' in ARM mode I think this is because MULTI_V5 turns on CPUs that cannot do big endian, and IXP4xx turn on big endian. (It crashes if I try to boot in little endian mode, sorry. It really wants to run big endian.) But before fixing multiplatform we can fix all of this! The networking patches are dependencies so I am requesting ACKs from the network maintainers on these. * tag 'ixp4xx-cleanup-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: ixp4xx: Convert to SPARSE_IRQ and P2V ARM: ixp4xx: Drop all common code ARM: ixp4xx: Drop custom DMA coherency and bouncing ARM: ixp4xx: Remove feature bit accessors net: ixp4xx_hss: Check features using syscon net: ixp4xx_eth: Drop platform data support soc: ixp4xx-npe: Access syscon regs using regmap soc: ixp4xx: Add features from regmap helper ARM: ixp4xx: Drop UDC info setting function ARM: ixp4xx: Drop stale Kconfig entry ARM: ixp4xx: Delete old PCI driver ARM: ixp4xx: Delete the Goramo MLR boardfile ARM: ixp4xx: Delete Gateway 7001 boardfiles Link: https://lore.kernel.org/r/CACRpkdahK-jaHFqLCpSqiXwAtkSKbhWQZ9jaSo6rRzHfSiECkA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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c845b55859 |
AT91 & LAN966 DT #1 for 5.18:
- lan966x basic DT and associated evaluation board pcb8291 (2-ports) - documentation for an upcoming Kontron switch board featuring a LAN9668 - one fix for an old bug we have with PMECC on sama5d2 in some corner cases - sama7g5 and its EK: crypto, CAN and DVFS operating points -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYhi3WQAKCRAfOrpwrNPN DOTGAP9y9/HV8EXrGhm8ZvH0ScfIkf3cPFyoFKtcN4EFNKb12QD/aSjSW17XEwTt L+RYm2x2lha8eVUteyRpZXZqmK8buwg= =3qii -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8xQACgkQmmx57+YA GNmEyg//ej6i6g/4dVcG1TQ+Fm4zSm19HM338FduYw2esH0P6pgUKG+V6sOBaFWF m2HaHPTsbaY90mshpym6rmC22UwEsdw64x5Z4en20NRrdLBjraVzLltz8UhLAEH2 +/pjw0CU/CxRE1z+OItfdElg3+HyJuPyF7rjXXCsM3DIMZzOR8CEXO9tt+K2EJKQ LgO5cz4a0lS6a0FUdXivq1jzRmQW2sUzvA+7XQ/KKczxLiNzgVWD92ysua9pzoBp a1eOrpr9BD2PpYawLlBQB995NjRCvgCf4P8QJDbjrOpfmbM13AqFi4Yk7LbKIY+d kvqp7Ru9Zbbvg7WW276jQOMbD53/AkmJEaomKsEJeazpvOOiDnMKsY5y0PZ8Ma/f +HSjAoXUSGw1x3+o/Ai8LlnOU6SXYo95OgmEz/KOpw08lBOkyWT2jSWEF+7bLHDg zw0vUQESSNsGMlfH1xWit9MLqlyr/WanAhQW3CKvsFfd8IEEo7dcA/djjWsTVgiS R5F9qJwq5/MLpxSESRJrUiVg5zBALEToHAdL+TsRD6aU0yBhsawaPQG2vWtCOdTw GIzY4GdYMo3izMDNaxcf+/ku/AjuCzTJGO73BKGrrY/e9Rk3vTBlNTp7FGBRxpb5 tu+X2uyXu8cMqzHcO/UYX7WN9OjVSIwFhS2Hf/3joK8ETxGpyy4= =+JfK -----END PGP SIGNATURE----- Merge tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 & LAN966 DT #1 for 5.18: - lan966x basic DT and associated evaluation board pcb8291 (2-ports) - documentation for an upcoming Kontron switch board featuring a LAN9668 - one fix for an old bug we have with PMECC on sama5d2 in some corner cases - sama7g5 and its EK: crypto, CAN and DVFS operating points * tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5: add opps ARM: dts: at91: sama7g5ek: set regulator voltages for standby state ARM: dts: at91: fix low limit for CPU regulator ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek ARM: dts: at91: sama7g5: Add can controllers of sama7g5 ARM: dts: at91: sama7g5: Add crypto nodes ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs ARM: dts: at91: remove status = "okay" from soc specific dtsi ARM: dts: at91: sama5d2: Fix PMERRLOC resource size dt-bindings: arm: at91: add Kontron's new KSwitches ARM: dts: add DT for lan966 SoC and 2-port board pcb8291 Link: https://lore.kernel.org/r/20220225110735.18080-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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eda2a6830f |
Renesas ARM DT updates for v5.18 (take three)
- Pin control support for the R-Car S4-8 SoC on the Spider development
board.
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Merge tag 'renesas-arm-dt-for-v5.18-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take three)
- Pin control support for the R-Car S4-8 SoC on the Spider development
board.
* tag 'renesas-arm-dt-for-v5.18-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: spider: Complete SCIF3 description
arm64: dts: renesas: r8a779f0: Add pinctrl device node
Link: https://lore.kernel.org/r/cover.1645795643.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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b10e270dc9 |
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
ARM: dts: r9a06g032: Add the watchdog nodes
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
arm64: dts: renesas: spider-cpu: Enable watchdog timer
arm64: dts: renesas: r8a779f0: Add RWDT node
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
arm64: dts: renesas: ulcb-kf: fix wrong comment
Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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5a29ea50fc |
Remove an unneeded status property from the crypto-node
on rk3288. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmIX+fYQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgXwbB/9VDhyjvWSdI/HNytYbMjCaxVv8S1PRZJNE I3dAxAYCfG50I8ztvuHBvv0V10x23jI0u2pnelk6kOTbYcCYI+dv7FnJ7oTa1G3I 4Sd8SAEVBeZ4lDlLgaQy4vyPYNIPxhfPwqNlAmGoRAG+RBcc37gbzf5Nmane4Uff B/H7zBIZ6gXRAuVMSJDMBKPHAQ+8FCbdfdfSzR/4haOnOAaiiMPELWwRgbLingvf u5G6EMbDw2dFVt/pHKiwGQtkwrNpMuSP1L072wAjPdoJfjpOyyJrHC5b3M9NymHp T76R2YnXBnO79vHS/+vu4vgJrQvP9p7TNyE/f+Ln6wUDvQmaLuyI =3tj2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8i4ACgkQmmx57+YA GNmy/hAAh9HSHRuGnLTXo6706dAozI8ZTuMqutGW7y3Jpi02eK/Y0J7/k5p8HyAJ VhIBprYg2k4JGNhlSDzG6mqkXzgnBkKYlefc6hll7fZkxT2BAVGFTWcV4JCW1ziI 6mpN0PIbGej7XHAvax3l7ygdnbDPpCcfaAESpqffgILjK7rp5ZTL2t+MMmUqW8kW Qrgb6xD207idJ1eVCTUZjvXRCsYLw3ZuytWLriwudyWafl1m384NK52sRgWqVNUW ZIrsqKZwtH8EeHDzQMzj3ucGBqONSxYrDrl5L2vmnRM5IRWrfp4bogvyveBc4apf 4GPi9pIEHBGm6OOIV201x3BW5RikpvWKKbapcmap8EcZexfb8oDKBPBcZ6C7BhOL bzf+FExpGfgRD/itqGWi4Z68Qtk/IyeQBIg8FnR4WAbuEzNDYmD68KPeaQfG1fto aB6eBRurPU6RL5B8lsBSofD7whipPUqK3sTCPju9Szc6avdkDIWOSIg7aH1BdzAW tlzgigrVnpPjIg9H2WFkmqRIM/x7r6U3cJicuLdMSKoOBLDozXXFvOSMn0BiSXZI NDKjK4aJHoWJcb10VD5F7QvEhJYBpY8hZ79JdcXpkkzBg9EZn4vPGQn05gC1rqJI mPmLF9dZcDfpJ+i3rVn566dFnlsKmrPeESZpNqVvu4a0U9KnaJA= =SM/M -----END PGP SIGNATURE----- Merge tag 'v5.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Remove an unneeded status property from the crypto-node on rk3288. * tag 'v5.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: remove status from rk3288 crypto node Link: https://lore.kernel.org/r/19595245.eudUkVceaq@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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84d08b2e54 |
New boards: Pine64 PineNote ereader tablet and Bananapi-R2-Pro (both rk356x)
New peripherals for the rk356x-family (pdm-audio, gpu, another i2s, usb2) A lot of additions to Quartz-A (connector-header, gpu, sdmmc1, io-domains, usb2) and rk3568-evb1-v10 (rk809-audio, cpu-regulator, gpu, tsadc, led, usb2, touchscreen). Fixes for the pwm-regulators, that used wrong names for their supplies as well adapting the cros-ec pwm nodes to a changed binding (going via the pwm tree). And as sort of misc-changes, defined the logic-regulator on rk3399-puma as well as enabled the mali-gpu on the rk3399-firefly. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmIX+P8QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgfZLB/9DUe9pJWRo7zg3GENlp9d3slQBJkBWHF4h SiYheGDbQyfWmPeH4PcvwfwsVmTdNewRTgmhEbNKyl64XEIEbIVi7GXEmfCaNipQ zEfTN/m1hMl1kn9gey+0yJT9K3oAkA4UqBUbGmgP/UuYcztZvnhjnt9Np60gwBhf l7de3OBFcxQUatq2Tfn+HbqiGA5aur/IfJzcrzK9kFXLi6Ox2nMZGN1U2CTmJEcT ZLFQH1tKQ0doacaAUtRSSx3IbTVSoOjr2imSzsfPKCM691OwwGC4XeJLVTn3QmVF 4WhDQsH+ufluG/dFHPA7Nqa1IVp9IX/QhOW1ZAgmODNVR37EkXGp =cIwM -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8fUACgkQmmx57+YA GNnjPw/+LYwi3YXP4izmG0u6y/Jfmy1J6T37FCZJEo8C9I92USUU+S6z9pEG5yrn LhmXogJj3zB6dGUcq7nFUXIUA5YMVGxofnFRbyxbGPUmRnQSfpOB2/g4aSEYf2U8 0OwD/4ajxVOP2mSimQ7gXnwpzfeUvNrml81VJ76OHZnVtEqt81l/vIyWpd3Dro00 EQN+THTAV4G2M6XhshILt5QTLdsWHwPoCaZAg0PwmIJDU/3NeBH92rXIQiWkE33R zmPJyOZ2ih3D2ceyVVdNp9uIvLcXeIpsXqIQv2dN0D5iXjviyBqfX787S4PFLlLO ibsYyB+JUkciwzHyRrKHRYlOXuZmhYDYcL1M+6STSMtmZfS3Kno6V9kOdPYWpTZ8 SluJYqdkED0NMggegunGj67qbe902hX9vuL3vISaZUll3Au48YGSEoEcpghf8kuE E2Uo4pnEkhN/1sSeZFyINUstKtqpa/XMAS2sK/CJQ09HjQfqvFnifjUxhjqYoAM6 ylhjDymjH11h3jWDmiJUpYfPxa4u/j598UI4ajvKgwPhd0ZxLug43d9IQBpFxux6 qXCWQrgUe39L5o8hfgQSXb58g72uGBXMRd8m7F3G52teGkFz+xentxHbJEZlX8oZ UQJXCDHhkFpGkD3TNOc4YbQW/ydDZo+OCzWopP3iU6oG2X3FPQY= =yqpJ -----END PGP SIGNATURE----- Merge tag 'v5.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New boards: Pine64 PineNote ereader tablet and Bananapi-R2-Pro (both rk356x) New peripherals for the rk356x-family (pdm-audio, gpu, another i2s, usb2) A lot of additions to Quartz-A (connector-header, gpu, sdmmc1, io-domains, usb2) and rk3568-evb1-v10 (rk809-audio, cpu-regulator, gpu, tsadc, led, usb2, touchscreen). Fixes for the pwm-regulators, that used wrong names for their supplies as well adapting the cros-ec pwm nodes to a changed binding (going via the pwm tree). And as sort of misc-changes, defined the logic-regulator on rk3399-puma as well as enabled the mali-gpu on the rk3399-firefly. * tag 'v5.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (28 commits) arm64: dts: rockchip: align Google CROS EC PWM node name with dtschema arm64: dts: rockchip: enable rk809 audio codec on the rk3568 evb1-v10 arm64: dts: rockchip: set vdd_gpu regulator on rk3568-evb1-v10 to always on arm64: dts: rockchip: add the vdd_cpu regulator to rk3568-evb1-v10 arm64: dts: rockchip: enable work led on rk3568-evb1-v10 arm64: dts: rockchip: fix supplies for pwm regulators arm64: dts: rockchip: define vdd_log on rk3399-puma arm64: dts: rockchip: Add Pine64 PineNote board arm64: dts: rockchip: Add pdm node to rk356x dt-bindings: arm: rockchip: Add Pine64 PineNote board arm64: dts: rockchip: enable the tsadc on rk3568-evb1-v10 arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10 arm64: dts: rockchip: enable the gpu on quartz64-a arm64: dts: rockchip: add cooling map and trip points for gpu to rk356x arm64: dts: rockchip: add gpu node to rk356x arm64: dts: rockchip: add usb2 support to rk3568-evb1-v10 arm64: dts: rockchip: rename and sort the rk356x usb2 phy handles arm64: dts: rockchip: add the i2s3_2ch node to rk356x arm64: dts: rockchip: Add Bananapi R2 Pro dt-bindings: rockchip: Add BananaPi R2 Pro Board ... Link: https://lore.kernel.org/r/6456947.djgVdjDsCv@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ceaf23fe3f |
Usual round of DT patches for the 5.18 merge window, with:
- DT fixes - ethernet0 alias for Nanopi NEO - r_uart node for H3/H5 - eMMC and bluetooth nodes for Nanopi NEO air - updated maintainers for Allwinner SoCs - new board: A20-Marsboard -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSPRixG1tysKC2PKM10Ba7+DO8kkwUCYhf4hQAKCRB0Ba7+DO8k k/78AQCri8W0S4biFkv9CkzDGF3zioN6f/nlkWg4IWWdCFFY7AD8Dhv6UQm2j4HZ sp1ipPUlHVcIknYhPX2jDbmOV/dt8gI= =Vuzk -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8aQACgkQmmx57+YA GNn8/g//bZBlICtTJPQTwv0gGFqF1whlItzggEsHNQvCluOlEob2DWj2MmtbDjDm F2J2fN6F0TXUIlCHTrxpU2r5HJvQnyZV/xKhwWXa4bi/fTbhZyD45duoltqy5U2e ss8g7KleA1UZ9X1FIStHYapN2FXkaujCJouVQNksVLXjmxQnmcvVTYT2fRKpAWO1 9523MR2z5w1/nneaBbw/K1hCkW1YASlfgdpiZ+oDMFWAwZRelk4nFY1Uotd+wYw5 1DTl2R0m70k3apwnbU/zerSvZ6Lu+WRJE6Su7DDFv5j8mM7KtaQV0yULXY0oASkT 1xqYUi2EJHYtQQXXat5XEKyvwPsmQVwLfyQEHgsup3mPWq8aZtdRQ1HH+hdVvuZO 19HLmPvKR6tuey4ujaHpWJmP8kCvHMp35b4wiv56NatYym5tG6vcOTiBGZdthILW +xAMcW7Hx96xFdVVBU/OnlyFxL9tquA02XkDPVhY9pHu4KGmhPAxqsv66Exf/mKX 0mOXXA6GC1gnzn3Fuy75WpUTA5K30M3gRQ28xbltqI4f1sMgxGScgxVAOhSuuBJ7 Dr8n4r8h4oegQ4eApF30XyxcYffgY8KTDOlWskYGCzdSboiG62a2yI26rhp/I0Gx a5Oq7Fm58bh6CnvzSkWBMJj1Ql9hpvmVCVeNUzQcRiS/X+8f8IA= =36rC -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Usual round of DT patches for the 5.18 merge window, with: - DT fixes - ethernet0 alias for Nanopi NEO - r_uart node for H3/H5 - eMMC and bluetooth nodes for Nanopi NEO air - updated maintainers for Allwinner SoCs - new board: A20-Marsboard * tag 'sunxi-dt-for-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: MAINTAINERS: Update Allwinner SoCs maintainers ARM: dts: sun8i-h3: Drop args in 'thermal-sensors' ARM: dts: sun8i: v3s: Move the csi1 block to follow address order ARM: dts: sun8i: Add ethernet0 alias in Nanopi NEO's device tree dt-bindings: arm: sunxi: add haoyu,a20-marsboard ARM: dts: sun7i: Add A20-Marsboard ARM: dts: sunxi: h3/h5: add r_uart node ARM: dts: nanopi-neo-air: Add eMMC and bluetooth Link: https://lore.kernel.org/r/YhgMJ0AqaHopzaW3@kista.localdomain Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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e03e97d5b4 |
Devicetree changes for omaps for v5.18
Devicetree changes for omaps for v5.18: - The devicetree node naming for pdu001 RTC name gets corrected - For logicpd-torpedo baseboard, isp1763 USB controller gets added - New board variant for SanCloud BBE Extended WiFi gets added -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmIV8/8RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXP9EQ//RP3aHRVqpLihhsJuXzpYOA3mjzqoTMX2 +BZOwFuU9+8FNKkiLO2CmIgQIlKMYsw8020aAskfSYnPjToVI5eM75ZhIbpVzJRZ OnJevrf+fzTkYyYhiS+3enyha9QoCf4/bGrKYXTxOUQmsclnnsBlrAir5zkVKM90 CCTnbj99bV1ycMMZdk9kgiNTR6skoTaHLGrVL1/pzLAWMijiecE+d4FHNHETBKzn 4naywy2G/1KshCepOmx6QM5oExTOFKV531Xw4U/zZpku+SMWDTbwBGjNt5FXuT9K Fa7dzoXZm7Hky4h6iioySWvsISrc325ft2RmxfHNYhc+9WraFxAZUvuzaThBrRdZ tSjOnFTq/Mm33TKZH4dFVQxnIC+4m6mC58+dI5aAIUXNs3rL6xbEyR2BYmj/e0BB mv8HuWI2JxGWII9QJvTbUASyH4lpYI7jAtYtwvsE5xYCvYMRnqZoEgvGxHrxlAw8 n3m5qjO8urBFOKw1Lz5+aHeB9aUBw+U4OavculEaZTswo6pCaNoofjMVLe37cMxc 08x9rV+X4wnG8VYHtP4YKx3QTDgmSw68ASd6B6Z0mJWhjEbyqtFpgRsXxsaSoLgd FoagqnJJDBKtAWhiM01cfIDRX9leyNWVoRuc8+uG4wqTRmaqKWlrF/1bEx7eqfUb lAemYu2E11g= =5YEO -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8X0ACgkQmmx57+YA GNlGbA/+KmVWLJCd/W8S1LsDYcRH/jED722NNdjw0IV/GyPKLWzo/P06nCtSwYGQ NsJYWbvufThNHoagkzohdmm/mithgaEcQygtO1H6KvhLY/uEo9uE2wQxIIJFN3ZI djmPTD8pLSXl6by8XegVNkqrqMdaa7k9P2dHL3hPimWR5k2wH2YQBfIc9kwtoxzS BKLXyUORaEdsHfum5SuHtHmUtEvy0SA3B0y94viKhELjvbGiKmLixuo0jzcLckTd UXKfZp3WW3eCwkOQuqeVem/pN/lJtvn77mizenoJ7D1B6DOJ7ZiRCmSpWS5egVS4 XCGxHdInEHi/oqiMY6wpe0UxqmsdtLSMJ7r96WsH5Lc8/lW9fX42ugxA8WzrvPH+ mwyI6KRyVrVjDeFp7d9MAryXtuk0/2GAL+6SLgqDYolgewTm79Is2tm9LYtuhvRg bklaWOQiCc6jTN65KUOqYSlIzMNKf8a6sfOMKJTQB+KYYSZ2hg5ZCTWXUUYFMkSr FSDYstzOj6KyIddcHLQEs+sYdaec0XKDt0kWjl0Y/fxhjjU4ELRdce0F9kxuhIgm LPRMt+H5i4WrxZnYPPm+uTIa5RlhW2fHWZcXi+1RH8s3/unoG3SWWwRXY+VVIIKn ixEEv4CeXmNWgCj/M/FZIRSsLK2+b2145i8F4Cpga4czggBkPcI= =HX09 -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for v5.18 Devicetree changes for omaps for v5.18: - The devicetree node naming for pdu001 RTC name gets corrected - For logicpd-torpedo baseboard, isp1763 USB controller gets added - New board variant for SanCloud BBE Extended WiFi gets added * tag 'omap-for-v5.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-sancloud-bbe-extended-wifi: New devicetree ARM: dts: logicpd-torpedo: Add isp1763 support to baseboard ARM: dts: am334x: pdu001: Use correct node name for RTC Link: https://lore.kernel.org/r/pull-1645606669-127734@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9ee83635d8 |
KVM: x86: Yield to IPI target vCPU only if it is busy
When sending a call-function IPI-many to vCPUs, yield to the IPI target vCPU which is marked as preempted. but when emulating HLT, an idling vCPU will be voluntarily scheduled out and mark as preempted from the guest kernel perspective. yielding to idle vCPU is pointless and increase unnecessary vmexit, maybe miss the true preempted vCPU so yield to IPI target vCPU only if vCPU is busy and preempted Signed-off-by: Li RongQing <lirongqing@baidu.com> Message-Id: <1644380201-29423-1-git-send-email-lirongqing@baidu.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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92e68cc558 |
x86/kvmclock: Fix Hyper-V Isolated VM's boot issue when vCPUs > 64
When Linux runs as an Isolated VM on Hyper-V, it supports AMD SEV-SNP but it's partially enlightened, i.e. cc_platform_has( CC_ATTR_GUEST_MEM_ENCRYPT) is true but sev_active() is false. Commit |
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3c51d0a6c7 |
x86/kvm: Don't waste memory if kvmclock is disabled
Even if "no-kvmclock" is passed in cmdline parameter, the guest kernel still allocates hvclock_mem which is scaled by the number of vCPUs, let's check kvmclock enable in advance to avoid this memory waste. Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1645520523-30814-1-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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40cd58dbf1 |
x86/kvm: Don't use PV TLB/yield when mwait is advertised
MWAIT is advertised in host is not overcommitted scenario, however, PV TLB/sched yield should be enabled in host overcommitted scenario. Let's add the MWAIT checking when enabling PV TLB/sched yield. Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1645777780-2581-1-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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1b29d1c1fa |
Arm Juno update for v5.18
Just a single update adding long waited support for SCMI firmware variant as separate devicetrees. I wanted to deal with this differences in the firmware interface within the bootloader for long time. But with variety of bootloaders (u-boot, UEFI, ..etc) and need to add SCMI and SCPI support for sake of discovery with discrepancies in shared memory layout, it turned out difficult. So, finally we are adding it as separate files so that we don't break support for older SCPI firmware interface. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmIVQ7YACgkQAEG6vDF+ 4piUsg/7B/d8NBgfXQ4WSVCDw7D5ekkTVSA8I1jOu084UCUCoQjJ6h9I0sMc8ALo ikYRgF34evJP78xl+AGsU7iQfeja4i4j+5frUt9pseiQ3XW7i+kFmp/bjX9XlYFQ HsGJ+F7oUp70W5YxfF+Ay1I9avbA6hDWqSE6gsFNVPRnVpphBzF7MvBBsTdl9CE8 ip/gTg2WEnjzdvCHyCQ9wGV8HozTtcR2Fz1WB3LaIpqToIui7gQ2KEazqTH5cJcS xovUdM5eMdvMHsblnLDn/ET6gvFlV1AeRxUQXQTDm8tqk/3cpRzZj0EcWJy2A6OE 0BQ63bw8bwqR+JW/vbhW01PdaA6uuKhKNINuP/RtCv++/UimDyI4QgRs8MzLFUYH 2JKptVQpaeracUElKNBkOGZGhzS9p8I9smzhFyZVHucBQA0vDzOX7e2BJpLyhTJV tnRMc+mUH6KHr97eEJxFiEVC6aI3UiaVgTjaMnEB7ED8yWa6x0bLbgX9RRhXj9W9 hNOuCMBuDhQZD86wVwUXAi2yB0UHlCNbmhEoegxaL0h7o1G0GyNB5crLMZwck4sy CCaLUZbUaJrsFaVpv5C6/M2xhwUtf/yKDlW65EduBc6KFKiZa4c1mrE+Ft2ZqD79 bVVLlzW/lz+2YdITrbyCCbzgNyQhwp4aNqHLwlwuDsSzhSD5uZ0= =g/zs -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8SUACgkQmmx57+YA GNmySg//WaF+/WTHSYleBvknbsmMQjvYz9LqpQmAXlJkxqnrbORgiBVByQ9SNgKg Pkz6j6Ex4se8KfzZUwMmdGhuN+pOWQKi3hd2YZtt4W5koTuVw9pDberafiskC7fV IGqdYvJtDBWZdlFfE9RZAYEvFt2cAHQJEBQQiNX3cgRl+RgqZpHC8Umm/1mLAo2a MgLRVVRkONxQN6DPtb6KOrLqWGmVo9+wDhDXHLqBQIMyHHj/fMuNOc/c98ePPUPI Z/0Rk/z8+Bt+6lc0FtLSjljSuSphkm//5IVle8v1KKAH3Iq0cmnjFAaXRH168naa oR4vyRFG7i+2syFHrSt5wRmsqQab99lyqwGUgNsD7+Fl+uxt53T0z2ijIDzP3aZE SyaQxwLUMyinPhppGNG7KoK7VEMqBpYJnhrtbDO8knrQK8SjFQY0t378lUvOFGPE orAGkNX5P8FH22zq/qsJT/ls8qQ6nC/fe/5g8tNcLqbO88hSmLd2yacRp9U1UOST ekVZZjQeDoWukPN11fSwSvKzrzx76xohtrN4NPzH+civuwr+J36PNz6R0nI7FDp4 ngs06jZztgNs4fItCmUhVgz2cgk96VDr8AZ2Fzt9+A4sPUcZWqy1yr5aip4/vVTE LwTvzPIiL4zWBosx0J2XaYMIPwUGtY35bYmHxavYeNPLMEgSS00= =D501 -----END PGP SIGNATURE----- Merge tag 'juno-update-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt Arm Juno update for v5.18 Just a single update adding long waited support for SCMI firmware variant as separate devicetrees. I wanted to deal with this differences in the firmware interface within the bootloader for long time. But with variety of bootloaders (u-boot, UEFI, ..etc) and need to add SCMI and SCPI support for sake of discovery with discrepancies in shared memory layout, it turned out difficult. So, finally we are adding it as separate files so that we don't break support for older SCPI firmware interface. * tag 'juno-update-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add separate SCMI variants arm64: dts: juno: Remove GICv2m dma-range Link: https://lore.kernel.org/r/20220222201812.3338619-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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52e71a47e8 |
i.MX arm64 device tree change for 5.18:
- New support for a number of i.MX8M Mini based boards: Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, Gateworks GW7903. - A series from Adam Ford to enable GPC, USB and display support for i.MX8M Nano. - Enable G1 and G2 video decoder devices for i.MX8MM and i.MX8MQ. - Enable PCIe support on imx8mm-beacon, tqma8mqml, imx8mm-evk, imx8mq-evk and imx8mm-venice board. - A series from Hugo Villeneuve to add PCA6416 interrupt controller configuration, GPIO line names and i2C5 support for imx8mp-evk board. - Correct I2C3 pad-ctrl and add internal display support for mnt-reform2 board. - Improve fsl-ls1028a-qds overlay support by dropping syntax hard coding and using overlay target for build. - Add overlay support for serial modes and imx219 rpi v2 camera on Gateworks imx8mm-venice devices. - A set of patches from Teresa Remmet to update phyCORE-i.MX8MP SoM device tree, including drive strength updates of different interfaces and PMIC configuration changes. - Device additions on various boards and some small random changes. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUi64UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7s3Qf/TtDGP7UBFb0nnqNgNzkiQfnxsRog iGcwwalE/Qn4Tq5ED/Sf34FOJut70fJ8chvbhqvCGkEOQPdgYOrFC8PmZw1VbKeX 5xNDihh3DAIEcGmJ89dDD5bkCepKOkyahm5c25RLzkUCOcKndoeWkzvU5bbMTs2w 8AJCrDmJ1+k5zyUXcKZlq3ySNhS4KQFD25dYGMvLy70oYhxCRtY/HLECLEStXVXs UJ5tdwPeb4jSLi5EM9oupy4V3IGfgBSSdFCLdpXtlOTmGg5Y5rHeO1E8mFRXvigO tCYo70SdzjLZPPxl9SUX6Ql7ShMYNZLtzmIVRn7Be2jRQ4xld9bXE4jFJw== =iEe4 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8JAACgkQmmx57+YA GNkUDRAAlwe2qrtugN8jUbnUIN41La5QiXOCAJYOQCosyCgAVb70ZGTIBJvOucyj bpwU3n4hN/nppMF47jct+RRE5UcPWNF4oB7LxgEe2SdqrkUmF9/moK5XjfipCTgr gvGln28un3mR7KS9cah3YFM/tTf749CeL5GiGx0veew39LxlYZMGA7wXIl1hJ1Tt Vl9jzfxsrVh+lzexQBJfAbWQAE4wM5WPwDl3H/o6xZGRZPCJkuNzdmZBvnZaC5WM ZT/R7CoeimHOV2936993MXjWkZqqZMaUBvrMGcoLYReq+0Qnht2hcETW/rHUa1+M 5nsPWSBfN8uN7jGP+qpz71eJbc8BQ/XKyximoJph9m3M1VbTNKjY1Lhq6dX2Fmyt cutVy70TGvOEjXJOctnWf973ABBhr+NnF5m0NAJ9XGsKEGI3j3tjgYO8rpcCVnm4 AdAqSv6/HF6PQkLuT/oJu8SfHzykvZDwkh+lAP2Hfnd+Y8DEkez+c96VkvW0lqzf TxrZIWQqrYGFPahB8rWjGzRPoLjJW6pfBEg/1iRmStMb2O+VQKzndf0DcYarrPjY 1ecrpGssvI701PP3ofwFoiOS4tGU/G955Lq8uKoT2DUVAXMOaaiGKUdxJyaMcfEr F4BK4eLvyn/t6XDzM+7Tfj1e054bbi9GO9JZFNbGwFLCOkzHurA= =atxP -----END PGP SIGNATURE----- Merge tag 'imx-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree change for 5.18: - New support for a number of i.MX8M Mini based boards: Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, Gateworks GW7903. - A series from Adam Ford to enable GPC, USB and display support for i.MX8M Nano. - Enable G1 and G2 video decoder devices for i.MX8MM and i.MX8MQ. - Enable PCIe support on imx8mm-beacon, tqma8mqml, imx8mm-evk, imx8mq-evk and imx8mm-venice board. - A series from Hugo Villeneuve to add PCA6416 interrupt controller configuration, GPIO line names and i2C5 support for imx8mp-evk board. - Correct I2C3 pad-ctrl and add internal display support for mnt-reform2 board. - Improve fsl-ls1028a-qds overlay support by dropping syntax hard coding and using overlay target for build. - Add overlay support for serial modes and imx219 rpi v2 camera on Gateworks imx8mm-venice devices. - A set of patches from Teresa Remmet to update phyCORE-i.MX8MP SoM device tree, including drive strength updates of different interfaces and PMIC configuration changes. - Device additions on various boards and some small random changes. * tag 'imx-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits) arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC arm64: dts: imx8mp-phycore-som: LDO5 needs to be enabled instead of LDO4 arm64: dts: imx8mp-phycore-som: Set VDD_ARM run and standby voltage arm64: dts: imx8mp-phycore-som: Update WDOG muxing arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines arm64: dts: imx8mp-phycore-som: Adapt eMMC drive strength arm64: dts: imx8mp-phycore-som: Set minimum output impedance for eth phy arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlay for imx219 rpi v2 camera arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlay for imx219 rpi v2 camera arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlays for serial modes arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlays for serial modes arm64: dts: imx: Add i.mx8mm Gateworks gw7903 dts support arm64: dts: ls1028a: add efuse node arm64: dts: imx8mp-evk: add support for I2C5 arm64: dts: imx8mp-evk: add PCA6416 gpio line names arm64: dts: imx8qm: added more serial alias to dts arm64: dts: imx8qm: add compatible string for usdhc3 arm64: dts: imx8mq-evk: Add second PCIe port support arm64: dts: imx8mm-beacon: Enable PCIe arm64: dts: freescale: add initial support for verdin imx8m mini ... Link: https://lore.kernel.org/r/20220222075226.160187-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9d71d4a9eb |
i.MX arm device tree change for 5.18:
- A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6 devices, adding I2C bus recovery, marking GPIO buttons as wakeup source etc. - A set of maintenance patches from Oleksij Rempel adding display, CAN termination and thermal support for i.MX6 based boards from Plymovent, Protonic and from Kverneland. - A couple of patches from Thierry Reding to correct i.MX28 RTC compatbile, and rename RTC device nodes for i.MX SoCs. - Update i.MX7 device tree to use audio_mclk_post_div clock instead of audio_mclk_root_clk, and move PCIe out of AIPS3 bus. - A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices. - Add pinctrl header support for i.MXRT1050 SoC. - Other small and random changes. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUixcUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7vDQf+N7EzT+AknNIBAKtW0O/Cjxlj78CA Urbfzo75ePeS5MCnfuI1RnIgZiWtvt2fSppjvls1f67vYw4RSZqsG/T3VVF+lefw Lnm/Z/Ak4qNwEyuX/pcAWxCpIHB1jSpSDxnr0mD0asfKF/QicEmOXH5s6lS75G45 ycItrZ8YXp1kiTqb346bqyUe5MQ7i9UWhj/WCH+0JLeW0NKdkbBPeU91eQKBhuMI qEiTxtPLL1vH4s7qy+lT3G+j6GapLqZfDWsPqLo+lIwy6jRmfruau1sIy4vu3Euo 0ntmBbRm4palWfzVqVlAX9JEop+gi5PE+YLUPlt0mjevWXpOCvrJoCHOWQ== =8N3I -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY8FIACgkQmmx57+YA GNl/fw/+L7PcpisPsiso7mSNuIgxUHBA8FAXw61dhYuODM1L+/3V5ULwrDOhlK6u KN8ISVBoosuPClL/AJgAF5XX8RjaiNignzhf4V2WKnImaBoBC2lWw1jvMsTpng2l Z6LFBWnalV1BJU363MBvQw5nNGNZY4hMlXI2IqXwBaUn14vI8xKPA3vKo5k4gS1J MD94T7iKyoYTwvfoBs18iD9xjpQtBUFY13BTZdVm329JMvDAc1l5gYzW4fcw7TaP kPQindcYvBXTaPR1TakpP69wYwQgV5hAN/qKY+J4LPkGsv+GjzOiu5dlOV99jP31 CPci9tScTB5H1DFs0ZPuLyln70TICKGyRPqpjBeXWQxcrmQJoqZSnZ2eSha2mhOc xVlbL6Yngy9qeUjfMcWNUHiJ9iuLo7ni1Qa1CjLr/OYeCrpXTqmpwKbgoXVvuF28 RsgzjCsdBEP+JB55nFtwF5KuLUXDA3u/fogT1V/aCA4iK/nbbrWgMxI8/ZcE5olh vln2YqMWvAsEqH5kHouCdJK9FUpCW+cb2DRO8MPOvO2xw+ufqUnT4xT+Q8D5vIJL 5nUemE19t9Ww2o5iZd4AWZMXNVkXX3/6tu9WrEq3UUq0GWFYztzJbmfGzFl88N7N sFM0/Bti7GFiICcGkkRf7sDZ8TrH7wAXObvcyia/N8u8MfABtps= =dW+C -----END PGP SIGNATURE----- Merge tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm device tree change for 5.18: - A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6 devices, adding I2C bus recovery, marking GPIO buttons as wakeup source etc. - A set of maintenance patches from Oleksij Rempel adding display, CAN termination and thermal support for i.MX6 based boards from Plymovent, Protonic and from Kverneland. - A couple of patches from Thierry Reding to correct i.MX28 RTC compatbile, and rename RTC device nodes for i.MX SoCs. - Update i.MX7 device tree to use audio_mclk_post_div clock instead of audio_mclk_root_clk, and move PCIe out of AIPS3 bus. - A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices. - Add pinctrl header support for i.MXRT1050 SoC. - Other small and random changes. * tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits) ARM: dts: imx6qp-sabresd: Enable PCIe support ARM: dts: imx6dl: plym2m, prtvt7, victgo: add thermal zones and hwmon ARM: dts: imx6dl: plym2m, prtvt7, victgo: make use of new resistive-adc-touch driver ARM: dts: imx6qdl-vicut1: add CAN termination support ARM: dts: imx6dl-prtvt7: Add missing tvp5150 video decoder node ARM: dts: imx6dl-prtvt7: Add display and panel nodes ARM: dts: imx6qdl-mba6: Move pinmux to regulator node ARM: dts: imx6qdl: tqma6: Remove obsolete comment ARM: dts: imx6qdl: tqma6: Mark gpio-buttons as wakeup-source ARM: dts: imx6qdl: tqma6: Add i2c bus recovery ARM: dts: imx6qdl-mba6: Move rtc alias to common location ARM: dts: imx7: Move PCIe out of AIPS3 ARM: dts: imx: Add missing LVDS decoder on M53Menlo ARM: dts: imx6qdl-phytec: handle unneeded MFD-subdevices correctly ARM: dts: imx6qdl-phytec: add missing pmic MFD subdevices ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk ARM: dts: imx28: reparent gpmi clock to ref_gpmi ARM: dts: imxrt1050-pinfunc: Add pinctrl binding header ARM: dts: imx6sx-udoo-neo: Add HDMI support ARM: dts: imx6qdl-dhcom-pdk2: Include missing headers ... Link: https://lore.kernel.org/r/20220222075226.160187-4-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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fd9eff2ebc |
i.MX dt-bindings change for 5.18:
- New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm, emCON-MX8M Mini, i.MX8MM GW7903. - A series of patches from Lucas Stach adding support for i.MX8M VPU and HSIO blk-ctrl power domains. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUWAAUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM5SVgf/drYYmyw2CEYS6wkzqENuIIWHuWvh OX3qBj5AC5ZXBLcbxXr1A/F428uCw4/qnnAWjv2LjCzeP0WGCh/mgpFMneiBAvBW M9N2yaadKIFL+dUXMtzOTD9SuNgxEqFKaarhcyzVSpZqVC3kdVJp6M2LBccKxyPM F0WB1mpzTEVEGFheHwSa+aibSkNRluoJfb+WSHubawMhuj0nP+3gDQAgcYP1g6fm eo6Ltar0s/gw3oE+fsSAlMUv2z7cRVclYaCA65HLnCjS0PgLRlVylvT33XC1l5co JGdccxSKy3o9BGf+SzGITqDNamgTne2pJhFBttdW5f5RkRjQNVHlBBm92A== =LamO -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY7+wACgkQmmx57+YA GNky+xAAwha6cNKM/oGvyJRN4A+s7MsFhT3YFupt6eMUko7xWDtVTzxTHjZOS3/W KEU6n8t8qGCTH2osMWKOhcojOz9p8L+bK6o9x8ljAlQVHVP/HIigqerN8eQ9LfEc dwFQLazX0lkRZA3M2SvfkfhFEuYkl9vxJflb91hlMRuoLK5RR0lop0MYPvXzHUpH 7JVYyNivvwkAcrFTDtAViO4f1DpNMXBWfltxXqLTsE7OUZycJUefVTvKV99kaYta 0qaWZ69cEW0CWuYC2wpUzsnIxAofaYNAibRz1oKJFtvv6N8MycH7V8xUyTC8iQ4N gOdq2fh8FKC9w3JfipmL+DZ+0CzFd4r5CY7lvOivfnxNr64uegh4gBEw4k9SM7Iu qi8YmX6VgF2MEkEBM8vVBSr6BnCCD2SV4KWMbPMVJYOARioTxLIfSV50XM8mCPug RdHYX6EHE0UwLotnresbK71k1wJjhympw6Qj/qIVr1Le3IQjXggGJDqlD8dDprDY +td9cambVE8CgewEj9AK6SSQoDXguBWbbV6KY5acwAwH37k/I/X1/KGATNoiZG8/ Ral5OMctJ1X9WgraNvSpfadJ61wUpfsHSJ7N/DzHn7Q+Co4fcJAgOvH56fQnolG4 uNTpzNjXWhmOdqEvFSKbfpxIjuSp08PFbv2N43eYyuUDdVD6iJ0= =/t9F -----END PGP SIGNATURE----- Merge tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX dt-bindings change for 5.18: - New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm, emCON-MX8M Mini, i.MX8MM GW7903. - A series of patches from Lucas Stach adding support for i.MX8M VPU and HSIO blk-ctrl power domains. * tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: imx: add imx8mm gw7903 support dt-bindings: soc: add binding for i.MX8MP HSIO blk-ctrl dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains dt-bindings: power: add defines for i.MX8MP power domain dt-bindings: arm: fsl: add toradex,verdin-imx8mm et al. dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini dt-bindings: arm: imx: add Protonic PRT8MM board compatible dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains Link: https://lore.kernel.org/r/20220222075226.160187-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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3b364358cb |
Amlogic ARM64 DT changes for v5.18:
- New Boards: - Amediatek X96-AIR (Amlogic S905X3) - CYX A95XF3-AIR (Amlogic S905X3) - Haochuangy H96-Max (Amlogic S905X3) - Amlogic AQ222 (Amlogic S4) - OSMC Vero 4K+ (Amlogic S905D) - Initial support for Amlogic S4 - Support for uart_ao_b & pwm_f on G12 SoCs -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmITd8cACgkQd9zb2sjI SdHmpRAAl2jQspBK/xAfWhPIDTq24N0dv1nM5NfSxQWTkKc81+BkRQ8RBxstOMh/ 8r+t9PTYY6kl7A07F7cACvL28xvITBkIoP/OQa6ycMORz8sd/TIhP+zaXK7VjiXv IQ8C+dqcm0Jow/iO2FqWLj1juJPYZ/4W2SfiImIPrpmQc0qmKz0so+KBAZiBYYLt hOi7LWGddbk/FnUsXRgbXkIzc5+xbgHDquOJkeO1umO3Xx/70fCRIZ6j4nc8SHBr 4kuE7mSToqsNkI4XwNQYhcbjfPaqUg7feAvKJfmidWSpKWRSjYdR0oUCks0PAAth FIxkvLPHxsd4jA30Q2PKYVowuVh44dBk8gCdhJ0NrHi9YZkpAuCwt2uySXB0iQnT AVNgWnb6OdAUjfd/94nu4/d/pDW0H1GHwKc4/wqjcGaLjL1cm/Cv9PKagIfwoDcA 4HKY23TE9jwXZp0ZRgCgI0pEg/j9XCUvoxzei3oq8FCtNrvP0FvkrTuMk2xhzuIq 9O5963EBLFFpDYcalds3aJgKNzX+EfsC70bpv+VXTYbv/iHW+1RdMqlIWSWb9twc KMrohiiK0hlu+gQEHUQKaWKuC63XF4WYHB1DQb+bdCm1ak+gLCAuzKokj4dL5b69 zBwnO5RvshX+n3ThqTC2uOFnLx24V10xAL55faMxa66KwnnHdyo= =/1MJ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY72sACgkQmmx57+YA GNmfhQ/7BpbYlPrAH9/u0xijjsOmqDq9ml2Hj5x85NtG+0qDgVepEEmsGJ2MfMuj UZt3sh+YAoxQhSG8rOuwCUCoBJFyVSQlR9JykmUZrVZ/mmJ5oZS8jWL30PJZ7B98 k3ArlS65lxrtnFljcDRV+HSpBe6cpWQokwPvH14OaKFFkOeGSoXUBvOi6oarTrqo PeU+O2dgYAGYnAcgnvv2ITs8Z+32KvhQ0V6VIirwtHQEUxHSDPCCYrxOpBgzeZB/ /Cb6EaSf6xuKgcWEb05AP6NKzMdmjJVumDuqm53f1jgkPRQsuqwFqOCn2w8Glr/7 2f+1a85V8Bm2o70r+C4hXuHIjMmpYpgR7t3LdGwvOtJITzld8KFeioZYCkL/OjUe lCxf/gOIDM+qItF0hq79u4G5CGRPQ3GqHHixrYbpBgHQB7r3HMA4IB6qL6tqlz8t B86baw361P2riYIBFdL+ERMouM2rkI2GOm6lFvIZgfnLNJLprEDhNUXuyWjY303f 2lUCI2KEW+w7cHBscoUTju/D5frg/JeDjWzM1rwCEByJDde1B4MRPoDPq+v12vBS 97j+m/nSPmloAe5jiFk7R7xN04DSSDYAseehOuZoStu4ynhoboo1HUIWJ5bQ7Se4 IRRTdVwmNZPdfC9iRwiOEsLQf5G7jCcRawhXLWneAbR/2pc/xjA= =FCVR -----END PGP SIGNATURE----- Merge tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt Amlogic ARM64 DT changes for v5.18: - New Boards: - Amediatek X96-AIR (Amlogic S905X3) - CYX A95XF3-AIR (Amlogic S905X3) - Haochuangy H96-Max (Amlogic S905X3) - Amlogic AQ222 (Amlogic S4) - OSMC Vero 4K+ (Amlogic S905D) - Initial support for Amlogic S4 - Support for uart_ao_b & pwm_f on G12 SoCs * tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: meson: add support for OSMC Vero 4K+ dt-bindings: arm: amlogic: add Vero 4K+ bindings dt-bindings: vendor-prefixes: add osmc prefix arm64: dts: meson-g12-common: add uart_ao_b pins muxing arm64: dts: meson-g12-common: add more pwm_f options arm64: dts: add support for S4 based Amlogic AQ222 arm64: dts: meson: add initial device-tree for H96-Max dt-bindings: arm: amlogic: add H96-Max bindings dt-bindings: vendor-prefixes: add haochuangyi prefix arm64: dts: meson: add initial device-trees for A95XF3-AIR dt-bindings: arm: amlogic: add A95XF3-AIR bindings dt-bindings: vendor-prefixes: add cyx prefix arm64: dts: meson: add initial device-trees for X96-AIR dt-bindings: arm: amlogic: add X96-AIR bindings arm64: dts: meson: add common SM1 ac2xx dtsi arm64: dts: meson-sm1: add spdifin and pdifout nodes dt-bindings: arm: amlogic: add S4 based AQ222 bindings Link: https://lore.kernel.org/r/a7cd9937-d441-3e1f-9709-8e80cc8814f1@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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fee1601dc2 |
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
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Merge tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
ARM: dts: wpcm450: Add pinmux information to UART0
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add global control registers (GCR) node
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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f7bc3bc5d3 |
Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt
* 'mstar-dt-next' of https://github.com/linux-chenxing/linux: ARM: mstar: Extend opp_table for infinity2m ARM: mstar: Add OPP table for infinity3 ARM: mstar: Add OPP table for infinity ARM: mstar: Link cpupll to second core ARM: mstar: Link cpupll to cpu ARM: mstar: Add cpupll to base dtsi dt-bindings: clk: mstar msc313 cpupll binding description ARM: dts: mstar: Add board for 100ask DongShanPiOne dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne dt-bindings: vendor-prefixes: Add prefix for 100ask ARM: dts: mstar: Add a dts for Miyoo Mini dt-bindings: arm: mstar: Add compatible for Miyoo Mini dt-bindings: vendor-prefixes: Add prefix for Miyoo ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W dt-bindings: add vendor prefix for Wireless Tag ARM: dts: mstar: Set gpio compatible for ssd20xd Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ece32a75f0 |
KVM/arm64 fixes for 5.17, take #4
- Correctly synchronise PMR and co on PSCI CPU_SUSPEND - Skip tests that depend on GICv3 when the HW isn't available -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmIY1HMPHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpD4LEP/R2R5nvZwaiJIcVopzJd4ayN16bBL6qCxXWm XsuMqdE8g/Rju3sxR/qtomDgB3GJoYpCyY28rrmVli0WBZRt9icFE1cnqUMbv5g0 Iyd+RS79LcKU6OMakAyjYX0NNwhGHr1mdD+gP8NSMny+2XWQSVcUtTVZOjSprI9L zFNtJxPs1wfCp3WOWF668dgrBi8TsPHte2y0110+BcrY1rzJF0HXZm8YimlLakOG Pk98dbpGMV1aKog5p9YgE3tP0oMjUcf7h+EZxuQmKF7WeFCfVg1M1xlovxRq/oEg 6KDUwUnNcDOtjUQ0pmCIPwm+rHJjlkEd+1MjZPf9L6fU0lPXmFN/DEawTh3iAsB+ xAaijEb5ImtgQgyhnDYwr5g307iXmrgSwGZKue0WOA2CTtryIXqdE02TqwZZHprm MmAaUBUKbLGVMxd0sImsnrHUM1nNOHnD0IDEUwRLbAHOjm0u8rRK6ewV/A2O66Zz A+AVpBZ3wd4jKkrN509d4TqomegXZQDL7hDHSgWPJDWQvOe0dFdWPJtjtamOg9Bq +DVdXfwhQR7pHQIQbufIL+80Pgv7oBdEVSbtOJL+O+xkiSiDwHwkPdJwkB/01QMm /f6oytJ/Kkhs+G+W6rn/bo/W1thgCBSnXntUz4qs+Cfpl4QDOIFvqMmwDdOHOzcN 9WrR6DZg =Nyln -----END PGP SIGNATURE----- Merge tag 'kvmarm-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 5.17, take #4 - Correctly synchronise PMR and co on PSCI CPU_SUSPEND - Skip tests that depend on GICv3 when the HW isn't available |
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766121ba5d |
arm64/mte: Add userspace interface for enabling asymmetric mode
The architecture provides an asymmetric mode for MTE where tag mismatches are checked asynchronously for stores but synchronously for loads. Allow userspace processes to select this and make it available as a default mode via the existing per-CPU sysfs interface. Since there PR_MTE_TCF_ values are a bitmask (allowing the kernel to choose between the multiple modes) and there are no free bits adjacent to the existing PR_MTE_TCF_ bits the set of bits used to specify the mode becomes disjoint. Programs using the new interface should be aware of this and programs that do not use it will not see any change in behaviour. When userspace requests two possible modes but the system default for the CPU is the third mode (eg, default is synchronous but userspace requests either asynchronous or asymmetric) the preference order is: ASYMM > ASYNC > SYNC This situation is not currently possible since there are only two modes and it is mandatory to have a system default so there could be no ambiguity and there is no ABI change. The chosen order is basically arbitrary as we do not have a clear metric for what is better here. If userspace requests specifically asymmetric mode via the prctl() and the system does not support it then we will return an error, this mirrors how we handle the case where userspace enables MTE on a system that does not support MTE at all and the behaviour that will be seen if running on an older kernel that does not support userspace use of asymmetric mode. Attempts to set asymmetric mode as the default mode will result in an error if the system does not support it. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> Tested-by: Branislav Rankov <branislav.rankov@arm.com> Link: https://lore.kernel.org/r/20220216173224.2342152-5-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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d082a0255f |
arm64/mte: Add hwcap for asymmetric mode
Allow userspace to detect support for asymmetric mode by providing a hwcap for it, using the official feature name FEAT_MTE3. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> Tested-by: Branislav Rankov <branislav.rankov@arm.com> Link: https://lore.kernel.org/r/20220216173224.2342152-4-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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cb627397e0 |
arm64/mte: Add a little bit of documentation for mte_update_sctlr_user()
The code isn't that obscure but it probably won't hurt to have a little bit more documentation for anyone trying to find out where everything actually takes effect. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> Tested-by: Branislav Rankov <branislav.rankov@arm.com> Link: https://lore.kernel.org/r/20220216173224.2342152-3-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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3f9ab2a698 |
arm64/mte: Document ABI for asymmetric mode
MTE3 adds a new mode which is synchronous for reads but asynchronous for writes. Document the userspace ABI for this feature, we call the new mode ASYMM and add a new prctl flag and mte_tcf_preferred value for it. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220216173224.2342152-2-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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21ed2f61cc |
STi DT update:
- various DT fixes to avoid warnings when build with W=1 - DT clean-up -----BEGIN PGP SIGNATURE----- iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmIL4PwcHHBhdHJpY2Uu Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pj9bD/9WrEqvCqp/j2/VZ7qJ WJgMj5SpMJl0xYn5Audq2sKzNXitoRQx4U8Oarlq059hWd5XzS1dQ9cNXp4jHiZC mejayjOZC2A3+xzR5PXL4Ap9VV6WAQcZS8wuMcJwyqjId0agigQFCUhzBkbk2nJI WJ40ls+X5C11tM5SWGbeVGf+nFRjPcGIHX6cxBCnMpGemtYxRir7xgt0YiCGeP+0 VfZ5xusQdbCMtP/Dv5AJgG8vGoldcLnpb5Ay/FSjttro/mWdf/lm4P9HcFYYkWyY vq9tQLCNxjNdtnIERQrAIb8uF7llz56ImgiUUbOwcN8Ho4im1jNyuDff7yxDIYSs 2PumhS+uvFqwJOi8UdIxLPfW1iziWXvfR6opsCsc2nsBkuxYgo2r8M2KC4mOK7Yf 0dwu6amvK/1JGG0xe3F+v3iDsKBcJtHS1MXs+W7wjpXXdpowFzthbVqW51MRhNLa E4TgxwDxrLJ7UgDSWtuWU5PwMKE+qTdxCufulfusHUzAg8aIrGRJbbnA3iy2+oaV nWBcym6jsydgZ6QfQjM+8LjmNIItx4CRrCnhCSvhGgd0YZIHrq/S+hkvISDCSAqm GoFKZOmO2irBivmQ7O+12btC7ZARmxKFmOHiIqKbUofSGVeg6MmQaBBiVG0GP+ui Thi70LMN8T5Vt4v1UIJVrQrfow== =m2Yv -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY6g8ACgkQmmx57+YA GNm3Jg//VDW9lYF/Z7DzPGHHvylTZwCeERAsUtFbIVch10+bPfHBNQqgfzGUvilo MHk8Zy1SAGJeLYuRg1LEceA1iAVEZkPIWMCDAmEFJGakxct9K/qEoV/m7xAINSvG nAnKyKO5yj6xoe5P/jftkosjL9dRCynyXFw0PbGBi6LEzKWsYatmEyg4ko9EFnj1 rncJRBTn6NBa2IqWTpDGFNTY6UdZFRZWyV23zXaXVEF0NCWkRJWaROZ04OGbBB2K QXWMZsazg+gAlcj0Z4gecRMRw8XGBxDvgWpHFKsbKQsv/uv7Ia2gbjDjDYtyt/8W FtL/Hz/jNE4MOGF4utd3QwInHIJypxtnIJktjWXhBCEpHQ3WdEQIR5Qf0TxEiDsx MWBqe+0NvgWjpZsPQT6eC2Y6oQN097gv1Eh2Gn2JD33rOy6oqwObe4nWpmL5VoTQ awovYAmBVulGHBj/kKK/KerfwldonrQuCzCTznQXpA21U4a1OLVjAadHsEFUudh3 YWEfhFz82UeaQES5hwK6oTD5UphLGN2UG7+IJ5olFNEar62SCodvkJUModXPnssU vcMtAYpScWW0nz1VP94ah7StIAn79aSXnRehU5lmSPAxA7fHPQAzhfzgPHibDQ4S zIaMuvzjN48Kdn5EbAPx/iiZUR39elsYKbSNld1RwijODqjorwI= =UUck -----END PGP SIGNATURE----- Merge tag 'sti-dt-for-v5.18-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into arm/dt STi DT update: - various DT fixes to avoid warnings when build with W=1 - DT clean-up Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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32de73e890 |
kselftest/arm64: signal: Allow tests to be incompatible with features
Some features may invalidate some tests, for example by supporting an operation which would trap otherwise. Allow tests to list features that they are incompatible with so we can cover the case where a signal will be generated without disruption on systems where that won't happen. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Shuah Khan <skhan@linuxfoundation.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220207152109.197566-6-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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6f50ebf280 |
IXP4xx patches for the v5.18 kernel cycle:
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7743b59fc0 |
Ux500 DTS updates for the v5.18 kernel cycle:
- Add battery thermal zones so we can monitor the battery temperature - Enable charging options on AB8505 - Fix up all the AB8500 and AB8505 nodes in accordance with the new schema. - Fix the mounting matrix for the Janice phone. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmIG2fwACgkQQRCzN7AZ XXOBsg//YA3N12II2lxCRHriTdz6L5jAUdArHMMgLNTLbNJAHLIgcGDDH2WwUTDH /Q+TNUEeQVSXbm5bflp4+SxX5OCkAWDNZVt1/MegoIotfDv7fjN0JwwPNJeQX61Y c/DH9sgVEXv/iS1kt8GGzlpnyg60G7w8mCQeEOQ0YIjJwkxk38zqMK9qzTrTgcFB XS9OPjCbBp4HEGOltVnQjbtiCEVU1N4yrwLYmkP+MF1Bs+/WDcfukj9gZGgJ9zGu ljivN6smB0BJ7b5D9Wf6CvYOPVYfe2gxhwOCb4Y8xIiPUXN6KrbdetsbwMdqz0AV Qwy8TiV6XFDL383mVcISLaRN64kEyfpMWeJPSTLNeNRJiKTrn/FiLb5k1+98lSZi HWjp5tnmLsQ7o56VPbx6vdxlimnJ/abyWwek3tlQDPUkHmj+4IxPBCSpLhAoQ59I z86af1wQ2Ggkn9CeXusoX8RDZZhK1C20nqi/4fWPv6G+r2z7YaVse2FcJhAlc8pE Vos/6pSKy8n+gqtBr6uCLbh8xXQo/0/HBddRpYZBTTWPyc+hejBdviXv+HBeJ0An ShuyX50yCbpCZknyBzQeNdDW7H9RSDTPQ8SSVUeM+YJxy67tmNVyK7D09EpHf5nd 5SaLQEkWK4joSawOLsb8VjGRTaHazbm0SsBAYZPZFCVhk5JmOLM= =h414 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY6K4ACgkQmmx57+YA GNl9ug/+Jm5Ms73+GTKcS6/oF2z7ASbF8mGk5H11qk1RTAZUrJfSgdnsCWmDNmuV fG8vHqtPVTtlYuaBMTc85bkdSdQFLuQJ9naK+SA1R7eHDjeMVgnkVyiHDOmGNrb6 ubELnMiXfTAQhqy0VpYaKlHYcMtgAmMsNWhXToHVyYuAppYGZuqcsvsy86TDVKYs yLLFHAVU/U+3725y/yqExfb3inhlrXQ4dl9qz5umKhsnONiW4f1gzOSPNATAtElV MN2cQb+RYPlb2Baxt/9U/nZLyK5qYZMsY3mMJmgsblC9NQ3bPsCzfEejI286oKOG tyJ+z5LQ8q5aCCWZRw3Joz03dzSLmW7WjFDukawoKKzK2+n4iMmzr1VFoaZ6QmKo IJkneaY6mK8gC44RKwr1ADQZT92X8V28VGMXrHYMV23+lYt2eM0fkGfruO2lf5Ox 62q7SZGa/bmQFVA2it2gDt2WQZzDpyok9aSVUSudzaiAb5j6wYBM5OjcVb8oHe8o 68vsHgtN5bv6Tehyy6WFo65Jf7sOuz9xyTESWuxLcT8jMnsL1FL+x4jhV7TxvZRH qC+lt3Vo1Y4YOIaM+of8dIpxp39grpnqslJ7auCSlhlM+knllslp/1NbZh+XpHjN x9SxkWiTCSrrgDETAPOg1E0bNl3ZOVgG2OXROySwcwpiSMmJFD4= =PAPT -----END PGP SIGNATURE----- Merge tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS updates for the v5.18 kernel cycle: - Add battery thermal zones so we can monitor the battery temperature - Enable charging options on AB8505 - Fix up all the AB8500 and AB8505 nodes in accordance with the new schema. - Fix the mounting matrix for the Janice phone. * tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Correct Janice accel mount matrix ARM: dts: ux500: Update AB850[05] nodes ARM: dts: AB8505: Enable charging options ARM: dts: ux500: Add battery thermal zones and NTCs Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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8e9e1aeed2 |
Renesas DT binding updates for v5.18
- Document support for the new RZ/V2L SoC and the RZ/V2L SMARC EVK
board.
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Merge tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.18
- Document support for the new RZ/V2L SoC and the RZ/V2L SMARC EVK
board.
* tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: power: renesas,rzg2l-sysc: Document RZ/V2L SoC
dt-bindings: arm: renesas: Document Renesas RZ/V2L SoC on SMARC EVK
Link: https://lore.kernel.org/r/cover.1644587209.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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0a2eec83c2 |
arm64: cpufeature: Always specify and use a field width for capabilities
Since all the fields in the main ID registers are 4 bits wide we have up until now not bothered specifying the width in the code. Since we now wish to use this mechanism to enumerate features from the floating point feature registers which do not follow this pattern add a width to the table. This means updating all the existing table entries but makes it less likely that we run into issues in future due to implicitly assuming a 4 bit width. Signed-off-by: Mark Brown <broonie@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220207152109.197566-4-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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3bb72d86d8 |
arm64: Always use individual bits in CPACR floating point enables
CPACR_EL1 has several bitfields for controlling traps for floating point features to EL1, each of which has a separate bits for EL0 and EL1. Marc Zyngier noted that we are not consistent in our use of defines to manipulate these, sometimes using a define covering the whole field and sometimes using defines for the individual bits. Make this consistent by expanding the whole field defines where they are used (currently only in the KVM code) and deleting them so that no further uses can be introduced. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220207152109.197566-3-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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879358fc67 |
arm64: Define CPACR_EL1_FPEN similarly to other floating point controls
The base floating point, SVE and SME all have enable controls for EL0 and EL1 in CPACR_EL1 which have a similar layout and function. Currently the basic floating point enable FPEN is defined differently to the SVE control, specified as a single define in kvm_arm.h rather than in sysreg.h. Move the define to sysreg.h and provide separate EL0 and EL1 control bits so code managing the different floating point enables can look consistent. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220207152109.197566-2-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org> |
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3b34d3a919 |
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
arm64: dts: renesas: rcar-gen3: Add MOST devices
arm64: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
arm64: dts: renesas: ulcb-kf: Add KF HDMI output
arm64: dts: renesas: r8a77961: Add lvds0 device node
arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
ARM: dts: r9a06g032: Describe the NAND controller
arm64: dts: renesas: Add GMSL cameras .dtsi
...
Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
|
4d9b86eb38 |
Samsung pinctrl DTS and driver changes for v5.18
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
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Merge tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung pinctrl DTS and driver changes for v5.18
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
ARM: dts: s5pv210: align pinctrl with dtschema
ARM: dts: s3c64xx: align pinctrl with dtschema
ARM: dts: s3c24xx: align pinctrl with dtschema
arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
arm64: dts: exynos: align pinctrl with dtschema in Exynos7
arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
ARM: dts: exynos: override pins by label in Peach Pi
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
ARM: dts: exynos: override pins by label in Peach Pit
ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
...
Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
|
ab2dad6f9e |
SoCFPGA dts updates for v5.18, part 1
- Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings -----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmIGRiYUHGRpbmd1eWVu QGtlcm5lbC5vcmcACgkQGZQEC4GjKPT01A//e6fvePZfadfVdK2HUmiHl9vCkykg oA6a4RYlRWBMG3Pbi1rRqnz189hSyKsdpupzgppuA+nnDA9sktupgVLGYqpsBKcf 8kE6cDwxhdv7EuDmXixdqsZFX6DIEkD7smtoKnTPw2UGFMjQ1s0HjdLwoLkPzbgq 5EnfrrbmL0AnlxoKpmpQsMogiExuy0OZpLDhZ28Zwr1cmFA88RUA1EOLaHQO2rBp RWnmtLgl5O8d4gpo+xSu8+FM1b/zPIuttjJt3SIp8lKrtM2xbLDpOJcD1iLC+Qg+ +VGPkkoZfGAcusnwjIj18dRacXhkpviyUWoFHWtiZXenf8eyn6yUJkZaX4MRkXiF y4UzgpR+g7/w0wylJWM7y1J4HxdMousNKmuOtm5SG6FmlEKE7Gjaf7M5Sh7vrrQE nY/pp4blzxuYEEK+R8M7nmWQdrMCohWpivLhL95sBQEdMBc0m+m92Dl+D8lLEEE7 Jb8htcqVlQXNkwI6zCAabEomboisDx8jnLMUoo55f0xw0b5RRIjkFzRvpJrPXfWX dGgI1gzxf3e5iKCz964KFN1H/i0Vi13b6pPvfnYmGVi84QGqrxTHhyPTUTtq3bI+ 8zimzOHQH4lOy+pbCukDgyEWh8mjat+PbXc+6DGq5k6DzJh4QlALRQc+v0b9J7zr YvMvKOWveS6C+/w= =7xfQ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY5VoACgkQmmx57+YA GNm6Sw/9Epm+bTbW4d/gAE/HSLFyFnpm7krNi+4Nkw2mY9JBNkJsTw/ne1gWimLU TKAppRv5UGCtWCtXwEdi6vNuxWo00HAv+BQ2fNAavA0iRBgYgEKDIqYgYecNbL5v WE2FAJDWSIFBBXd0F5IXY5t/og9ezQApBZEMtqma2w/VHlzEYstHyLbvtFNFCqTn /mAiSe8TvkYZAeuyOYI8qNkIykpD6Uydh+wFWdYjh08tKD1hcZ5josRcLHBJir6A uobX8QrgNVcrEIZDViKxIexA+3ChH70U5No57saqEW5CYNpDIFeysht/UhrK4qAd XDmwBmKwFBSKKZ9etoY2mYar0F+FBN8Dzcs4SaRX9bRdNfL5jQS/IUMM186FAUvt h/qsr5c+3BUt9ztVDxckFC5O6gAGFxTdF8NvOlGXSI8VAuHpe4IAAtrAWg18nFDj CiwaOf6hGVR4WZQWBB1D66/ymfIkHVh635q5bQaqBJKNisI6aBahz9A4Tg6vmLxJ TsncdINxYY3DUzOD13EbC/TchK0fh9/KPUNTAMNXo1oHL1AbCiOlf00fm9f8AvTR VTO1PTc/9nFfv3E8vNbnCtIik4JgtF+bzatflQNrj4gVZmNwqKY9i6AMPSghv3st G6guMFnB+GAht8uWOiKh8xHMWqEVp7Mat0Lukf/P4SOwtDodFqc= =01X/ -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA dts updates for v5.18, part 1 - Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings * tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (22 commits) ARM: dts: socfpga: cyclone5: align regulator node with dtschema ARM: dts: socfpga: arria10: align regulator node with dtschema arm64: dts: agilex: align pl330 node name with dtschema arm64: dts: stratix10: align pl330 node name with dtschema arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema arm64: dts: agilex: align mmc node names with dtschema arm64: dts: agilex: add board compatible for N5X DK arm64: dts: agilex: add board compatible for SoCFPGA DK arm64: dts: stratix10: align regulator node names with dtschema arm64: dts: stratix10: align mmc node names with dtschema arm64: dts: stratix10: move ARM timer out of SoC node arm64: dts: stratix10: add board compatible for SoCFPGA DK ARM: dts: arria10: add board compatible for SoCFPGA DK ARM: dts: arria10: add board compatible for Mercury AA1 ARM: dts: arria5: add board compatible for SoCFPGA DK dt-bindings: clock: intel,stratix10: convert to dtschema dt-bindings: intel: document Agilex based board compatibles dt-bindings: altera: document Stratix 10 based board compatibles dt-bindings: altera: document VT compatibles dt-bindings: altera: document Arria 10 based board compatibles ... Link: https://lore.kernel.org/r/20220211112556.98940-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
7e2d8a61c6 |
Samsung DTS ARM64 changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties). 2. Fix issues pointed out by DT schema checks: - Add necessary clock controller inputs on Exynos7. - Add USB DWC3 supplies. - Drop old syscon phandle on Exynos5433. 3. Add initial Exynos850 support and WinLink E850-96 board using it. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmID1JgQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD18iiD/90edW4hfaViW6+PkoBrgFMxJ8uN0d7KfVZ RFSYwxgOA2RKFSOOKoipWrVHh9d9/7P5wyaemWnHoJL0zYDl41Of0BJeasBj0A8P SsYg0O8RPYBmh8J9VHp4mjNDpqQ8fdDMJhi3GxR4AcocO2/cWqmdeO6Emd1Zn4IL R0XViCu5ZC4PEbkocCMDAgsEf4QYQHi7f0QqnMkTWGW5YpPQFGYiup5wX7AWRv3J z+WWNBmfeisqXO5uZXC2t87jQ6jRWe0L+uM1edez86M3PbKb+/vwpPqypVfuqIfA 3G7On4XG1TTTuh8UL56H9UtH34mxvuhXMJMRtktLkx3FRNug9ojD/uaOAGRvnIzi TPpNpG5HvHnvrSv/W/aE/nkfKTExbmK9Z0FRMYpYQnbDnJDLJOxlyFATqMgsP6u3 m2OFU862WZ9hX3pXKq4Mwq51k4Bxq8mV4VvVp5Hk64BMTF7RofI+xFUtIgkK9KCj XikYE29OSfB/rWevEw+SgsIaEyyX4JhsiyMz4cSkCiT3NJSFzLXLWxzk5i/DYY4Z LE6sUBz3hw8/+CnBGcuVtbbe9tJn4R2YUmr9N//G0cc6IynmQhAV1/FuuCp+C1np HXmNl1B+viAfGVXkpmajxlaauqEhQQad2NEgZWvy1b1fjn5zyNB3BtGx5lczv2cI QJLGgOefSw== =vdIn -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY5GoACgkQmmx57+YA GNl7JhAArk28g6n5nIsOXkjbjjVfO2CkDE36IWj6v80BYVphd+0sPEQIBuYLEJqT 3QUIVfM1/f8YDiSwrhs6MlS1Igor26MRlkwi5Hn/9NMCWjpd3R4THPx2pnIjn2K1 Ya6ibhNEetD7DwHaOE6Utx+CtMSUZZC7ytT9eS2SZWHkPprMin2m+R+u9yH1DoJl ZmHVMsPo2hIvW2IkPDiciql2TyQOpwYb61Y5qP2+5t9ll13DdvKd4z04mU0GOrn2 9W/mNtKKTjKHEHL+MtgCkt1X0CzOimYTTcQ22oPNwCMkdjXDNTEdnpqFXvMchpoh 0bFU0ahmiyJiYv4sv/s2vVzOWOQy/n5JEVmeu6znaKEIVm9a/ppquZXdO0Fxn5QV 4kWFUmETux+rC2TiL5muDdAizzbX9aONmFSNYtzVpx71AYK3SVFN2IxAUhCuzXSt OOmw7p2KOZ4ltpzuvYxQNkGY0ti3cX1v57XMQOdr7fN3lfIOO7nRRgjPWlMBVv+P jBvoucfawJgLaSPt+83um8O9sbMkT8et8a7EA72w7i2Y9Z0uWAGz5pxuDvLbs6K7 N1odhDfDzrNe2Iz+ojJLfTo9+aoAX+oNiEHlGa4oTQI10yALvRwGj1su2toFhFbI jGKYZ4goKEzZmKA9QYeut9dqsPlLg1kNkgAx7UQZVfdaA8yjTOE= =QdZn -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.18 1. Minor improvements and dtschema fixes (node names, properties). 2. Fix issues pointed out by DT schema checks: - Add necessary clock controller inputs on Exynos7. - Add USB DWC3 supplies. - Drop old syscon phandle on Exynos5433. 3. Add initial Exynos850 support and WinLink E850-96 board using it. * tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7 arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASS arm64: dts: exynos: align pl330 node name with dtschema arm64: dts: exynos: Add initial E850-96 board support arm64: dts: exynos: Add initial Exynos850 SoC support arm64: dts: exynos: add USB DWC3 supplies to Espresso board arm64: dts: exynos: add necessary clock inputs in Exynos7 arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2 Link: https://lore.kernel.org/r/20220209145226.184375-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
8fbf28934a |
drm/i915/ttm: fixup the mock_bo
When running the mock selftests we currently blow up with:
<6> [299.836278] i915: Running i915_gem_huge_page_mock_selftests/igt_mock_memory_region_huge_pages
<1> [299.836356] BUG: kernel NULL pointer dereference, address: 00000000000000c8
<1> [299.836361] #PF: supervisor read access in kernel mode
<1> [299.836364] #PF: error_code(0x0000) - not-present page
<6> [299.836367] PGD 0 P4D 0
<4> [299.836369] Oops: 0000 [#1] PREEMPT SMP NOPTI
<4> [299.836372] CPU: 1 PID: 1429 Comm: i915_selftest Tainted: G U 5.17.0-rc4-CI-CI_DRM_11227+ #1
<4> [299.836376] Hardware name: Intel(R) Client Systems NUC11TNHi5/NUC11TNBi5, BIOS TNTGL357.0042.2020.1221.1743 12/21/2020
<4> [299.836380] RIP: 0010:ttm_resource_init+0x57/0x90 [ttm]
<4> [299.836392] RSP: 0018:ffffc90001e4f680 EFLAGS: 00010203
<4> [299.836395] RAX: 0000000000000000 RBX: ffffc90001e4f708 RCX: 0000000000000000
<4> [299.836398] RDX: ffff888116172528 RSI: ffffc90001e4f6f8 RDI: 0000000000000000
<4> [299.836401] RBP: ffffc90001e4f6f8 R08: 00000000000001b0 R09: ffff888116172528
<4> [299.836403] R10: 0000000000000001 R11: 00000000a4cb2e51 R12: ffffc90001e4fa90
<4> [299.836406] R13: ffff888116172528 R14: ffff888130d7f4b0 R15: ffff888130d7f400
<4> [299.836409] FS: 00007ff241684500(0000) GS:ffff88849fe80000(0000) knlGS:0000000000000000
<4> [299.836412] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4> [299.836416] CR2: 00000000000000c8 CR3: 0000000107b80001 CR4: 0000000000770ee0
<4> [299.836418] PKRU: 55555554
<4> [299.836420] Call Trace:
<4> [299.836422] <TASK>
<4> [299.836423] i915_ttm_buddy_man_alloc+0x68/0x240 [i915]
ttm_resource_init() now needs to access the bo->bdev, and also wants to
store the bo reference. Try to keep both working. The mock_bo is a hack
so we can interface directly with the ttm managers alloc() and free() hooks for
our mock testing, without invoking other TTM features like eviction,
moves, etc.
v2: make sure we only touch res->bo if the alloc() returns successfully
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5123
Fixes:
|
||
|
|
76990b47e8 |
Samsung DTS ARM changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos5260.
- Drop unsupported regulators on Odroid XU.
- Add USB DWC3 supplies.
- Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
10.1).
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Merge tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos5260.
- Drop unsupported regulators on Odroid XU.
- Add USB DWC3 supplies.
- Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
10.1).
* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
ARM: dts: exynos: add charger and battery to p4note
ARM: dts: exynos: update dma node name with dtschema
ARM: dts: exynos: use define for TMU clock on Exynos4412
ARM: dts: exynos: drop old thermal properties from Exynos4210
ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
ARM: dts: exynos: add USB DWC3 supplies to Arndale
ARM: dts: exynos: Add support for Samsung Klimt WiFi
dt-bindings: arm: samsung: document Klimt WiFi board binding
ARM: dts: exynos: Add support for Samsung Chagall WiFi
dt-bindings: arm: samsung: document Chagall WiFi board binding
ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
...
Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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9d28fe1bec |
Tesla FSD ARM64 changes for v5.18
Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry and defconfig change. This brings and enables this new platform. This includes clock controller bindings (header files with clock IDs) which are shared also with Tesla FSD SoC clock controller pull request. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmH9SB0QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1zpnD/9xV+X85LiKRWWuYeDtLBOzwuqCKAEVBX+U ZVGEuS675Ha4RrskEOWHBqxBePV7dposFaBWv59wGlnTESrz4N5jtdQu8WJYatp0 WzTTpgdmQBldKHjS1xtEBK7aZ3UOfvGEEGh+dkIX8U+DxdSzfil10XpnLeplOLUs pzpb8YdwSKX4VwRTRNuZpthN/VKTcIykANvm+DbKEl8F5kFjHWrlPFgU11XmLzZp ngzB2AeNHWqSjDJR/JZjbjlF7SsFCbfVTYBVLVoiiHKDVgpds6rM1LiR9OjY9skp W8egM8q2tO7mVNdFnNEK1k/CaioJUgBhEFUdxycR8Q0YoJP2dRnvQ3kEEI30suGY EoNULUyLLa61yMIgzQ8RF8RBo/Pb9lJDvr4DyG8InDANr9Y9bLHqi4Rmm4h6BJYb Y5cEhorY8qCmxBvllj9PdjCO0e1FanxO+RsVBgzDw3iBo6mrGXdFy1CppZ3BUSI1 NcNc5D5TRIkSo8JU9gFe+bVCjI2h1QQkZFERraH2f801wKQi7kD7/c8TE2KQR6Ej uz7BRA9cIlE2tDqzWVtmSM+ida5c8CsTGknk1aWKM6cwGB5wM6JhHnJfg4mBUGZj BCdUmRfqRYX4+2E01YyUjbqjbSGxYkvyPPw9LBr2ii3di4G7FInwfyrvD4O7IBBL UUn0MFjD3w== =tXfh -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY47wACgkQmmx57+YA GNnklg/8CNnZyxSIOo258Bixbpf7ArNIVXuwd2mDUQO5w/dt6/y1HPErk1x/FJO5 u4x3ugyCOJOPXnZy/We38M1NXJI7+RWfkvnHObGGLqsHf6YPICEUZqAlVuAT0fJn eWGTD1XOmf3m7r6xpSn8W6dxZ31tU/ST3WcecSBEcX4URJULdtF5Umqyh7RXTjYL HX3QvJwKxeNCnIUbsPJK7Iq0Y77AFgzPpn7iSO4qiP5lAK+YWRuT8jQKaIOGKJxz lw5rkYhq8pQD0Amlm/DYxrvfJJZEU83FEzMxx9ZmeeU3LoixVvWgA2H0phjZP03k 0sbshjOhUSLFIfduk1oZSbkYxQAsDsF8r1Jvrbr5LrVI+2C7vQoqTwG+neaqksnp CmNYDvAhugdVGHBGZTeQzeVMq8swV5o+3DJtlnKPp6gXlrJjFOECE63F4f1Pc+Fi CE9KRBLqFSrdHyAfi3bwAcS8tTnhRYx6I6NYjCp+qa4wEREw8X8HBLDRemWsoqB2 T19W864mkGPPbkmxaf5/F9LcJNU8tSd86E3hSIn1fgusEKTkv50KaEZ0GrLV45ou GYTAYfIVRG+9RZpQOlmHPMAJ2DIoHB1EXrvPmD73Tyrgo3sZhftClNkikZKbDGDp XplUjSnClvsUBe4cbO4zVw/s7wQwIe8x+CEl/3Ry2L6MV/fysMY= =l8Oq -----END PGP SIGNATURE----- Merge tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Tesla FSD ARM64 changes for v5.18 Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry and defconfig change. This brings and enables this new platform. This includes clock controller bindings (header files with clock IDs) which are shared also with Tesla FSD SoC clock controller pull request. * tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: fsd: Add SPI device nodes arm64: defconfig: Enable Tesla FSD SoC arm64: dts: fsd: Add initial pinctrl support arm64: dts: fsd: Add initial device tree support dt-bindings: clock: Document FSD CMU bindings dt-bindings: clock: Add bindings definitions for FSD CMU blocks dt-bindings: arm: add Tesla FSD ARM SoC dt-bindings: add vendor prefix for Tesla Link: https://lore.kernel.org/r/20220204154112.133723-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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4013e26670 |
arm64: module: remove (NOLOAD) from linker script
On ELF, (NOLOAD) sets the section type to SHT_NOBITS[1]. It is conceptually inappropriate for .plt and .text.* sections which are always SHT_PROGBITS. In GNU ld, if PLT entries are needed, .plt will be SHT_PROGBITS anyway and (NOLOAD) will be essentially ignored. In ld.lld, since https://reviews.llvm.org/D118840 ("[ELF] Support (TYPE=<value>) to customize the output section type"), ld.lld will report a `section type mismatch` error. Just remove (NOLOAD) to fix the error. [1] https://lld.llvm.org/ELF/linker_script.html As of today, "The section should be marked as not loadable" on https://sourceware.org/binutils/docs/ld/Output-Section-Type.html is outdated for ELF. Tested-by: Nathan Chancellor <nathan@kernel.org> Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Fangrui Song <maskray@google.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20220218081209.354383-1-maskray@google.com Signed-off-by: Will Deacon <will@kernel.org> |
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032e6c3379 |
arm64: cpufeature: Remove cpu_has_fwb() check
cpu_has_fwb() is supposed to warn user is following architectural
requirement is not valid:
LoUU, bits [29:27] - Level of Unification Uniprocessor for the cache
hierarchy.
Note
When FEAT_S2FWB is implemented, the architecture requires that
this field is zero so that no levels of data cache need to be
cleaned in order to manage coherency with instruction fetches.
LoUIS, bits [23:21] - Level of Unification Inner Shareable for the
cache hierarchy.
Note
When FEAT_S2FWB is implemented, the architecture requires that
this field is zero so that no levels of data cache need to be
cleaned in order to manage coherency with instruction fetches.
It is not really clear what user have to do if assertion fires. Having
assertions about the CPU design like this inspire even more assertions
to be added and the kernel definitely is not the right place for that,
so let's remove cpu_has_fwb() altogether.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Link: https://lore.kernel.org/r/20220224164739.119168-1-vladimir.murzin@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
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