[WHAT]
Add KUnit tests for validate_dsc_caps_on_connector() covering a port
without a DSC AUX channel, the branch AUX workaround, the cascaded
Panamera hub override, a DSC caps read failure and a decoder that does
not advertise DSC.
[HOW]
Attach the absolute DPCD fake to both the root and the port AUX
channels and populate the DSC capability block, then select each path
by tuning the branch descriptor and the topology, and check which AUX
channel is recorded along with the parsed DSC capabilities.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for is_synaptics_cascaded_panamera() covering a
matching cascaded hub, a non Synaptics branch, a non Panamera device
ID, an unsupported branch firmware revision and a port without a
parent branch.
[HOW]
Allocate an MST topology manager with a branch and a port, and drive a
table driven test that fills in the branch OUI, device ID and firmware
revision for each case before checking the returned verdict.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for dp_get_link_current_set_bw() covering every link
rate the helper knows about, the unknown rate fallback and the DPCD
read error path.
[HOW]
Add a DPCD backing store for the DSC helpers that is addressed
absolutely, because they read offsets spread across the whole map. A
table driven test then programs the link rate and lane count into the
fake DPCD and checks the returned bandwidth, with one entry arming the
AUX transfer to fail.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for dm_dp_add_mst_connector() covering successful
connector creation, inheritance of the master connector properties and
the connector init failure path.
[HOW]
Set up an MST topology manager owned by a master amdgpu_dm_connector
plus the mode properties the helper attaches, then add a port and check
the resulting connector, its property values and the encoder links. The
failure path is driven by a mode config without the connector functions
required by drm_connector_init(), and the port reference count is
checked to confirm the error unwind releases it.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for dm_dp_aux_transfer() covering the message size
rejection path.
[HOW]
Build a drm_dp_aux_msg whose size exceeds the aux_payload buffer and
verify that dm_dp_aux_transfer() returns -E2BIG without issuing a
transfer.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
The MST DSC helpers in amdgpu_dm_mst_types.c are compiled only when
CONFIG_DRM_AMD_DC_FP is enabled, which no UML KUnit build can select,
so none of them can be reached from the KUnit suite.
[HOW]
Widen the CONFIG_DRM_AMD_DC_FP guards to also build when
CONFIG_DRM_AMD_DC_KUNIT_TEST is set. The only caller of
validate_dsc_caps_on_connector() is guarded as well, so guard it by
IS_ENABLED() instead to keep it out of the KUnit build while still
referencing the helper. With the real bodies now built,
dm_mst_test_fp_guarded_public_stubs() no longer describes reachable
behaviour, so remove it along with its case entry.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Disable FEC for certain panels.
[How]
To align FEC HW/SW status when enabling the option.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Yi-Ling Chen <yi-lchen@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for amdgpu_dm_plane_init() covering the rotation
property and framebuffer damage clips on newer ASICs, and the default
color pipeline on DCN 3.0 and newer.
[HOW]
Initialize an overlay plane on a standard DRM KUnit device, varying
the ASIC type, the DCE IP version and the DC context DCE version to
select each optional property.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for amdgpu_dm_plane_panic_flush() covering the
request to clear DCC and tiling on the active pipe.
[HOW]
Install a spy on dc->hwss.clear_surface_dcc_and_tiling and drive the
flush with a non-linear framebuffer, counting the calls that ask for
the tiling teardown.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for amdgpu_dm_plane_handle_cursor_update() covering a
cursor reported as disabled, and an enabled cursor whose attributes
are assembled before DC programming.
[HOW]
Add a fixture binding a 64x64 cursor plane to an amdgpu_crtc whose DM
CRTC state carries no stream. Place the cursor off the left edge for
the disabled case, and advertise the degamma ROM capability for the
enabled case.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for amdgpu_dm_plane_atomic_check() covering the
success path taken once DC validation accepts the plane.
[HOW]
Extend the shared atomic-check fixture with a resource pool that has
no validate_plane callback, so dc_validate_plane() only inspects the
source and destination rectangles.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for amdgpu_dm_plane_fill_plane_buffer_attributes()
covering the pre-Vega dispatch to the GFX6 modifier decoder.
[HOW]
Run a GFX6-family framebuffer through a 1D tiled modifier and check
the decoded tiling version, then repeat with a GFX9 modifier to check
that the decode error is propagated instead.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for amdgpu_dm_plane_add_modifier() covering the
allocation failure that happens while growing the modifier list.
[HOW]
Seed a capacity whose doubling overflows the kmalloc_array() size
product, so the allocation fails without fault injection, and assert
the list is released and cleared for the caller.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Extend the amdgpu_dm_plane_format_mod_supported() test to cover the
rejection of a format that carries an extra plane alongside a DCC
modifier.
[HOW]
Reuse the existing GFX9 DCC modifier and ask for XRGB8888_A8, whose
4 bytes-per-pixel main plane passes the bpp check but whose alpha
plane collides with the DCC metadata plane.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for dm_force_atomic_commit() covering a successful
restore of the connector, its CRTC and the CRTC primary plane, and the
error path taken when the connector state cannot be duplicated.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for amdgpu_dm_connector_init() covering a HDMI link
that is fully brought up, a DVI link that maps to a DVI-D connector
without a CEC notifier, and the get_modes() helper hook it installs.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for amdgpu_dm_update_freesync_caps() covering the
DisplayPort invalid-MSA refresh range along with its narrow-range and
valid-MSA-required rejections, an eDP panel advertising replay, the
HDMI AMD VSDB range with and without a parser, a whitelisted DP to HDMI
converter, the forced FreeSync minimum quirk, the MCCS capability
withdrawal and the replay teardown.
v2: rebase (Alex)
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test for amdgpu_dm_initialize_hdmi_connector() verifying
that a CEC notifier is created for the connector.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for amdgpu_dm_connector_init_helper() covering the
common connector defaults and attached properties, the HDMI,
DisplayPort, DVI-D, VGA, eDP and unhandled connector types, an MST
branch connector that skips the root-only properties, the content
protection property and the default HPD debounce delay.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for create_stream_for_sink() covering the preferred
mode timing recalculation, the scaled path that keeps the previous
refresh rate, the automated test timing override, the DisplayPort VSC
SDP colorimetry decision with and without the disable-colorimetry
quirk, and the HDMI vendor specific infoframe path.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why & how]
DCN IP team recommends SDPIF_PORT_CONTROL=0 as POR value for APUs.
The new POR value ensures that DCHUBBUB will not disconnect the SDP port to DF unless it explicitly
receives the pre_cstate_req signal. SDPIF_PORT_CONTROL=1 will only be used for IPS entry sequences,
where it will be restored to 0 upon IPS exit.
Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The RMCM logic was embedded inside the MPC block, sharing its source files,
functions, register definitions and other logic. This tight coupling
created several problems:
- The RMCM vtable was bolted onto struct mpc_funcs, making it impossible
to instantiate RMCM independently of MPC
- RMCM resource acquisition had no tracking - there was no mechanism to
allocate the 2 available RMCM instances to pipes or release them
[HOW]
RMCM is now a separate module:
- dc/rmcm/ directory with per-ASIC implementations
- new struct rmcm with its own funcs vtable containing shaper,
3DLUT, and fast-load operations
- removed all RMCM code from MPC
- added RMCM resource lifecycle management in dc_resource.c:
- resource_assign_rmcm(): Assigns the instances for a whole context, so a
plane that is only now asking never evicts one already using an instance
- resource_release_rmcm(): Clears the pipe's allocation.
- updated resource pool constructors (dcn42, dcn42b, dcn60) to create
RMCM instances via the new dcnXX_rmcm_create() and destroy them in
pool teardown
Reviewed-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
add energy accumulator on pmfw 0x00685000 and above version.
Signed-off-by: Kevin Wang <kevin.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Retire the legacy design, always enable unified MES on GFX 12.1 and drop
the driver code and MODULE_FIRMWARE entries that only served the legacy
path.
Signed-off-by: Horatio Zhang <hongkun.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Description]
- UPSP should only be enabled when we want linear scaling for 420/422
- In DC for non-FP16 formats that are told to scale in non-linear, program
bypass for PRE_GAM since these formats are already non-linear (i.e.,
YUV420, YUV422, RGB, etc.)
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Taimur Hassan <syed.hassan@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Hwss executors shouldn't be coupled to complex dc structs such as
pipe_ctx.
[How]
Refactor cursor offload hardware sequencer extension to accept only
the parameters required for programming cursor offload state.
Extract these parameters in the generic HWSS layer for both immediate execution
and block-sequence construction.
Reviewed-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Signed-off-by: Tomasz Siemek <tomasz.siemek@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When the commit b67d2d039f ("drm/gem: Add callback for when handle
count goes to 0") added the handle_free callback, it did not update the
rust abstraction, which will cause a build failure when that is enabled.
Rather than just adding another None initializer, use
..pin_init::zeroed() to make all unlisted callbacks None, and remove the
existing zero-initializations.
Fixes: b67d2d039f ("drm/gem: Add callback for when handle count goes to 0")
Reported-by: Thorsten Leemhuis <linux@leemhuis.info>
Closes: https://lore.kernel.org/all/aaef18cd-ab55-4fb8-8563-ca3a5ea9cbc6@leemhuis.info
Reported-by: Thomas Zimmermann <tzimmermann@suse.de>
Closes: https://lore.kernel.org/all/4da62a4b-c4ef-492a-9a27-b56bd4784acf@suse.de
Suggested-by: Gary Guo <gary@garyguo.net>
Signed-off-by: Klara Modin <klarasmodin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
add energy accumulator on pmfw 0x004e8600 and above version.
Signed-off-by: Kevin Wang <kevin.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
GPU metrics v1.3 defines energy_accumulator as a 64‑bit field.
The unsupported‑firmware code path assigns UINT_MAX, which is neither the
full‑width invalid value for this field nor its default value.
Fixes: 8de9edb359 ("drm/amd/pm: remove invalid gpu_metrics.energy_accumulator on smu v13.0.x")
Signed-off-by: Kevin Wang <kevin.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
bo_va is assigned from fpriv->csa_va, which is already verified to be
non-NULL by the surrounding if statement. The inner NULL check can
therefore never trigger and is dead code, so remove it.
Signed-off-by: Jiangshan Yi <yijiangshan@kylinos.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When building with -Wincompatible-function-pointer-types-strict, a
warning designed to catch kernel control flow integrity (kCFI) issues at
build time, there is an instance around mp1_v13_0_eeprom_send_msg():
drivers/gpu/drm/amd/amdgpu/../ras/ras_mgr/amdgpu_ras_mp1_v13_0.c:157:25: error: incompatible function pointer types initializing 'int (*)(struct ras_core_context *, u32, uint32_t, uint32_t *)' (aka 'int (*)(struct ras_core_context *, unsigned int, unsigned int, unsigned int *)') with an expression of type 'int (struct ras_core_context *, enum ras_fw_eeprom_cmd, uint32_t, uint32_t *)' (aka 'int (struct ras_core_context *, enum ras_fw_eeprom_cmd, unsigned int, unsigned int *)') [-Werror,-Wincompatible-function-pointer-types-strict]
157 | .mp1_send_eeprom_msg = mp1_v13_0_eeprom_send_msg,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
While 'u32' and 'enum ras_fw_eeprom_cmd' are ABI compatible, hence no
regular warning from -Wincompatible-function-pointer-types, the mismatch
will trigger a kCFI violation when mp1_v13_0_eeprom_send_msg() is called
indirectly.
Update the second parameter of mp1_v13_0_eeprom_send_msg()' to be
'u32 msg_id' to match the prototype in 'struct ras_mp1_sys_func' (which
was recently changed to support mp1_v15_0), clearing up the warning and
kCFI violation.
Fixes: 11a948c781 ("drm/amd/ras: Support retrieving bad page info from mp1_v15_0")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
resource_build_info_frame() derives colorimetry and RGB quantization from
stream->output_color_space. A Broadcast RGB-only atomic commit updates
that field and reprograms the output CSC, but none of the InfoFrame update
predicates include output_color_space. The sink can therefore retain the
previous AVI InfoFrame range while the source starts transmitting a
different pixel range.
Treat an output color space change as an InfoFrame change in update
classification and in both stream programming paths.
Hardware testing on an HDMI 2.1 television confirmed that its automatic
black-level selection follows Full to Limited and Limited to Full
transitions in SDR, HDR, and HDR with VRR active, without a modeset or
visible link blank.
Fixes: 6eb4c13a38 ("drm/amd/display: Support "Broadcast RGB" drm property")
Signed-off-by: Satyajit Roy <sroy14@alum.utk.edu>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu_dm_get_output_color_space() applies the Broadcast RGB connector
property to default RGB output, but always selects full-range output for
BT.2020 RGB. Consequently, explicitly selecting Limited has no effect on
the output CSC or AVI InfoFrame when HDR uses BT.2020 RGB.
Select COLOR_SPACE_2020_RGB_LIMITEDRANGE when the output encoding is RGB
and Broadcast RGB is Limited. Keep Automatic and Full at full range, and
leave YCbCr output unchanged.
Add KUnit coverage for limited-range RGB output through both BT.2020
connector colorspace values.
Fixes: 6eb4c13a38 ("drm/amd/display: Support "Broadcast RGB" drm property")
Signed-off-by: Satyajit Roy <sroy14@alum.utk.edu>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
DC uses dc_edid_caps.qs_bit when constructing the HDMI AVI InfoFrame
quantization-range field. Although DRM parses the sink capability into
drm_display_info, DM never copies it into the DC EDID capabilities. The
field therefore remains zero and the AVI quantization range stays at its
default value.
Copy rgb_quant_range_selectable for HDMI sinks and extend the existing
EDID-capability KUnit test to cover it.
Fixes: 6eb4c13a38 ("drm/amd/display: Support "Broadcast RGB" drm property")
Signed-off-by: Satyajit Roy <sroy14@alum.utk.edu>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This reverts commit c119d05a36.
It removes the newline even when there are no fences attached to a
struct dma_resv, leading to multiple BOs being output on the same line,
making the debug file less readable, not more as the commit intended.
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
gfx_v8_0_init_microcode() allocates rlc.register_list_format before
loading the MEC firmware.
If loading one of the subsequent firmware files fails, the function
returns through the error path without freeing register_list_format.
Use gfx_v8_0_free_microcode() in the error path so all previously
allocated firmware resources, including register_list_format, are
released.
Signed-off-by: Willian Oliveira <williandossantosdeoliveira287@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This is now set for all GMC 12.x variants in
early_init() so drop the duplicate setting.
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
If sending TLB shootdown to a remote GPU fails, reset the connection and
mark the connection as NOT_READY.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
On the LSDMA path amdgpu_ualink_send_command() ignored the return of
amdgpu_lsdma_copy_mem() and polled the remote completion for the full
timeout even when the copy failed. With a peer down, every NPA-REVOKE
send in amdgpu_ualink_exp_cleanup_worker() wasted ~2s, and the peer
stayed ESTABLISHED so each subsequent handle cleanup timed out again,
piling up past the 120s hung-task threshold.
Return immediately when an LSDMA copy fails, and mark the connection
NOT_READY on a failed revoke send so other cleanups skip the unreachable
peer via amdgpu_ualink_check_conn_ready().
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
If the userq doesn't support in a system. then there's no
valid userq_doorbell_xa entry to walk over and then has a
no-op.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A hung SDMA user queue wedges MES, so the MES packet reset times out and
falls back to a full MODE1 reset - once per in-flight job, a reset storm.
The queue is still on its HW slot at the first hang-detect, so use
detect_hung_queue to recover its slot from the doorbell and reset it over
MMIO, which does not need MES. Mark it HUNG (not UNMAPPED) so the restore
worker does not re-map and re-run the guilty job, and short-circuit the
per-fence hang-detect re-entry once the queue is already reset.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Match each SDMA queue's DOORBELL_OFFSET register against the given
doorbell to recover its (instance, queue_id) HW slot. The per-queue
register stride is derived from the named QUEUE0/QUEUE1 registers.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Match each SDMA queue's DOORBELL_OFFSET register against the given
doorbell to recover its (instance, queue_id) HW slot. The per-queue
register stride is derived from the named QUEUE0/QUEUE1 registers.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
GFX 12.1.0 queues are managed by MES, not by the HWS runlist, so the
127 queue limit does not apply.
The topology advertises 32 CP queues plus 16 SDMA engines with 6 queues
each, so creating every queue needs 128 and the last one fails with
-ENOSPC.
Signed-off-by: Horatio Zhang <hongkun.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an optional per-IP callback that maps a user queue's doorbell index
to its HW slot (instance, queue_id). It is needed to reset a hung SDMA
user queue over MMIO, since struct amdgpu_usermode_queue does not store
its HW slot.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This version brings along the following updates:
- Ensure requested LSDMA bandwidth stays within the SOP bound.
- Refactor DC_SEND_CURSOR_INFO_TO_DMU to drop the pipe_ctx param.
- Add an override for LSDMA bandwidth in the QoS table.
- Expand amdgpu_dm KUnit coverage across vblank IRQ, self-refresh, GPU
reset, plane update, MST resume, cached suspend state, writeback
transitions, atomic validation, connector-state restore, EDID CEA
parsing and DM IRQ source handling.
- Keep streamclk gating off when enabling streamclk.
- Remove unnecessary includes.
- Set mpc_tree_params->opp_id during OPP resource construct.
- Add override capability for UTM table params.
- Add immediate restore to FAMS2 for DRR.
- Fix missing APG registers for DCN60 HDMI.
- Exit IPS before connector detection on resume.
- Fix HF-VSDB DSC bpc detection to be cumulative.
- Fix unused params in flip schedule.
- Enable the FW locality check in DCN6.
- Fix DC Hub reference frequency assert range.
- Dump clock registers in HW init instead of SW init.
- Validate the IRQ source in the DM IRQ handler.
- Revert "Fix CalculateFlipSchedule Calculation".
- Assorted DML updates.
- Update urgent burst calculation to account for unbounded requests.
- Add a stressed peak-bandwidth probe with DMA contention.
- Revert "Unify CalculateFlipSchedule Logic".
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
