The A523 family gains support for I2S and SPDIF audio interfaces, as
well as the GMAC200 Ethernet controller.
The H616 gains support for the NAND controller.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmkZfdQQHHdlbnNAa2Vy
bmVsLm9yZwAKCRA4mlQhnA8kMKKbD/9bETTswOzUEUIVzp3zXMnNSfraZzfqokoo
Qz9MhJLzP7GdWf+6db9Epjk68zA7InEgVDW5hgxELFzxkb+wfgZ9ALP+2d1t/4vB
yod+T1hIovproOKlthSMHUjKm4AtydSvwlhQdQnSwPOcOoTf8+oU0FWThVnb46ek
jMyWoNrljN6IWrMyj+mlvsuqOAFBJRuhntgwwCyP51lgYiOp2L5SV4Eytl97MbWp
2o05tFGB8GfYWRjy6Et9aq1Fb0sgrtj4WsbhGam+YkIvatWoXRxZxr/69CkoPx1/
SiAEKdky1S4eqH7KIiPnlSiy4n0Bh3m2CUZXYLwH1gMt7NKmbQRhLI98CcDHV6Iy
8pMiOkn7JykFOekbSs2q8yAZ69NNstIvlm8QsAHp8QgODHnu5xM9EWxeauICePQA
0fyQ3VTxv4vQeDvRzvM1was0plgoLDopHmbCt++vQWxuGS0tr/iAVZUqHZboB7qX
duy5l5MmnaKZuM+VMT+zcKB56WHJhvMrmbI/2DixgP+tp0RNDj/VSF2rCkaPMg+q
6Fm+P9KxTeBpGWQsZTEi9UOenIYdSk0GOOeOaUs70sQdX/wtgG/B6N6oKf3u6Rjb
2I/C1MltraLaj4J0MjxHImF2JoZvq28YHFiuxWIioj6WJaKENUwSfHsezmrooIzQ
iv8oLPtqcA==
=dBsI
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgjVUACgkQmmx57+YA
GNlz9Q//T+UuWSK9Sq5D3pFQ3A3qpO4Iu/9OAu9YvN2TRZYG6t7Y9xpC448I1plC
3bha1EUzSKnIhUVR4oWM9x80hKSnTWJ/kMeeMLJkUsEZklDhS1lsRLTyVz7v71Jr
t+V6d4/O9UcwuKbCVAO4nDlYFGVUl/pVXwa/IdDRYWpTl1s3wlSyl9PF4wruFWqA
6yRgZDdDwzptpWT7L0gZDeM87ke8xy+ozsSRXarIlu1Q/sdc9u2SjpRLWS9Sep/j
8h0Txhf5YurR6EXz7C6Pn2hmAn7AsNU1wD0lWSEoBMQFhsbWxrMp2Y5E8ZSbtBow
yHP9nxSt9gIpph5W15LPRhkue2721Vg3wxWYFj664Mi/2iphnrj54/Ayb7sJ1tYN
n7cWGE1vTFXom9ipkebjO4aw63GvuSjnTNVUVo+j3RiBO2M3uP9Mhnc+Mlau8ElN
DdiJtpU5Pk+0UWhzG1MgL8KARwVnGqedhdQ5iYhphW1cNi27KJnj1J7ThvT9RC51
04GlGrGz16/RZZLzN+yZ3s+Uy/OmZBPz4fnwH0JIQEuOQDf78/JUaOg97gRFa2NM
oyVe9w5MTjg3MY72qO3+OkceBSFQ2JHgTwgYgB0ELAzQJBAnELc+oIuL/46/3v26
BJTFOnRS3+4yoPZ6psmUfq7n5EDAc1fBQroaSjncuKL61vEfu8k=
=QrZO
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner device tree changes for 6.19
The A523 family gains support for I2S and SPDIF audio interfaces, as
well as the GMAC200 Ethernet controller.
The H616 gains support for the NAND controller.
* tag 'sunxi-dt-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a523: Add SPDIF TX pin on PB and PI pins
arm64: dts: allwinner: a523: Add I2S2 pins on PI pin group
arm64: dts: allwinner: a523: Add device nodes for I2S controllers
arm64: dts: allwinner: a523: Add device node for SPDIF block
arm64: dts: allwinner: a523: Add DMA controller device nodes
dt-bindings: dma: allwinner,sun50i-a64-dma: Add compatibles for A523
arm64: dts: allwinner: h616: add NAND controller
arm64: dts: allwinner: t527: orangepi-4a: Enable Ethernet port
arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port
arm64: dts: allwinner: a527: cubie-a5e: Enable second Ethernet port
arm64: dts: allwinner: a523: Add GMAC200 ethernet controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a bunch of additions and improvements for older devices.
Tegra210 devices now have empty reserved-memory nodes to improve inter-
operability with certain bootloaders. These chips now also support more
multimedia engines. A new variant of the Jetson Nano is also added.
Jetson TX2 sees some improvements. PCI endpoint mode is improved for
Tegra234 so that reset interrupts are properly routed.
A new RTC device is added starting with Orin.
Rounding things off is a flurry of small fixes for DT validation and USB
OTG mode.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmkYPjwACgkQ3SOs138+
s6FRXQ//Wvj9R+OgSu1egYc2CGPkM5LHxCWnqf7r80EbW020Vp9WuiFPJjsNgBpf
nICaKYS5Yc4JuN1ayqa8YjNhjTy7FuuVMszMPQ+q0MsjHXYbA6N4ubNMwKfQdWm7
KGI2aAm3/SVYSBIjBsU9hNbkRYh165izxOlga5mC3ZzBIkifMnxjMLPUtNedOpq2
pxXxrCZXrZ0WfVFnULOyQJ6kdDrpTh1HELPBUzCI8yCioU8JoG7zZz/llx3f0f07
zp+pIEacuwzYL0LR0frTUA9pENXHqa5ttq5VS8l2LWCEGkfc28aodu26/mvcZcV9
c6UOKrqwj9e7+AyR+tFKq8/w0CRenyuU9oRnr1DrBSKnpowc9kz8V9pyoisbd8MM
u7ZehhFajZVg6QEPXkjF5iEWLj6zWwRrtQbmDrRV9FD35GA12uNyfgQe1p1M7mwE
AuzRKS5hKosz8vZ/GINI+nQ8mXsWZTzDMN0QccPUJ37zlbh9leUIBY8n2Q7rGekO
sOD1DS8Jivy3XSWl9gJ0OWdXoB2kEYzgbC2O6hV+46WPb6DQNWK8A9uZGs7oqJ17
L8dGYzFaELas/RKyjxU34XqPwsAYgjrVzpAK5kszqGP+W7FaVdgt9s4/dKVKmv5D
1m92my3vaOsGoxIt2ubSOb+hhUBK4yah5Sad5vm1JZaLkPSSuyw=
=y8B/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgi1EACgkQmmx57+YA
GNm/DxAAkkP1d+cxi4q/sHLNjIG315rRnah9nQ6CIdG8UamcJEhuqKhw/aCR0UXd
2oeMfOEf/u0epNyRd+zqh9aTwI1cwLgRyFQVGp0+i4e6cVlDhZHqJMpAbCe3+0vk
sQ3BoVqyLSe7svmBbjedVWMlia9kufZGxhEuOhQz2uYHjrVAocvBuIrh17wEBS6t
zjdVI7fpD1zLVSEQv4LuaiZadjyb/PoEATaBujbBskSw9K3oaCv+y6T0u1aCppBL
4xVcARRblCTdxbSr8R3oQICKZTNLYHc7u+10eiDMZbTUfc40pHZe32HUdNcbI+G4
LsHg5SmrDi8ZLgZs2ZCm7a33QH5QMbD42K0jfFdeQNXu/iht4b3WjfjUaLkSSUF/
SIt6bI03Lmle9drIENThKZX7WpGQ7ejHujkRHJuWU7oJdab/tIT+3t4lfrOf+RLo
cfLLzobi1GgNBstUJ14N7VsvEJn0c0nuNVTxfNlzmrzQO0ou4Pvq2u8nDYZ9eSwl
T6Mray1XGLOyxYwtAz3clupwqitaiYQ8/mviFz2Yv26t7gCMJw2tEUSWTcvy8/mE
24l4FZ4nYONl/oyeKT8uqFHHUQ9Yhcqmp5b6dpHgN9vB3s/IqEoPzS1tF+PdDVHX
I982r+UFJ1Zlo+TacJXiOLviMHIvPa9VloUlyNaQ7RFxfH/9aO8=
=RdSU
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.19-rc1
This contains a bunch of additions and improvements for older devices.
Tegra210 devices now have empty reserved-memory nodes to improve inter-
operability with certain bootloaders. These chips now also support more
multimedia engines. A new variant of the Jetson Nano is also added.
Jetson TX2 sees some improvements. PCI endpoint mode is improved for
Tegra234 so that reset interrupts are properly routed.
A new RTC device is added starting with Orin.
Rounding things off is a flurry of small fixes for DT validation and USB
OTG mode.
* tag 'tegra-for-6.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
arm64: tegra: Remove OTG ID GPIO from Jetson TX2 NX
arm64: tegra: Set USB Micro-B port to OTG mode on P3450
arm64: tegra: Add NVJPG node for Tegra210 platforms
arm64: tegra: Add Tegra210 NVJPG power-domain node
arm64: tegra: Add interrupts for Tegra234 USB wake events
arm64: tegra: Add reserved-memory node for P2180
arm64: tegra: Add reserved-memory node for P3450
arm64: tegra: Enable NVDEC and NVENC on Tegra210
arm64: tegra: Fix APB DMA controller node name
arm64: tegra: Add default GIC address cells on Tegra210
arm64: tegra: Add default GIC address cells on Tegra194
arm64: tegra: Add default GIC address cells on Tegra186
arm64: tegra: Add default GIC address cells on Tegra132
arm64: tegra: Add OPP tables on Tegra210
arm64: tegra: Add interconnect properties for Tegra210
arm64: tegra: Add ACTMON on Tegra210
arm64: tegra: Add device-tree node for NVVRS RTC
arm64: tegra: Move avdd-dsi-csi-supply into CSI node
arm64: tegra: Drop redundant clock and reset names from TSEC node
arm64: tegra: Move HDA into the correct bus
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add more host1x devices on Tegra114 and Tegra124, as well as CSI for
Tegra20 and Tegra30. Support for the Xiaomi Mi Pad is also added.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmkYO/AACgkQ3SOs138+
s6EeWQ//cnwzLFNnLIUrH73IEbxiamOaTdHcIZRdrVdGUK5bP79sdQZQVyzkGbUR
kHWPi85QqiMj+Wk7oHNefKdSATVoUZXZRXbjRQtyHOjWRvsir+LspolI5HQMClA9
aVjgsPSELkBOqfJUNwxpbGtprLBQuZVr2e/Uum+DGvSC5rW6jIe9uEvUsPEMHZyU
jxqosbdaylLEYcrF3+ThFENVO1H2Kg1FYGHIQoykYQyQPg+jI8wRAmiTrul4kzQA
iBfsCGOUT/VPgktIcHKy6TBvmke+eOhWltlYm/n6XeXdLVzwoH6M0gmKQeHvZVgZ
JGGrwF3u0PAbKcsogOgcIY3/t6VYAg9yJXMJHeopkoUgmOxBKva7sdXxeakz50fu
FU0gyMZ7pWQtL5FSB6h87ichQ+PHOO0aAvesNmDCGR1YoHE+PbzXf0zs1MDAEjX2
ReJ0NGgK+z80wG1O4mjKhCfASkacJQxVViySqALTCAtxd0G3ffSOBwmfZYxIIi2O
8sgwLgx1Z1zeoJp/QBvm+yONiIQDbCpbNOYCusOeWZBLtYlNqyUsTkaxpCimoGNR
4xJdL1xloknDpqiByPj1grkQQos7J9YT4OdA1sUpfbzX/xDaaVe6NC0DtNFHM/4H
rPnv8URtwA+0/esJLl3mok5KQ3kf9nY6jhsdfQ4Ai3rWuu5HQwM=
=ecPk
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgisEACgkQmmx57+YA
GNladBAAkwtBeQJO9NZsDNxmjQ66KnDEXJO55BrhvIxOZxC1pZz9mGw11Vzf3Pqf
/tftBLn17OIfzyaY15JLwKUTLfdyA9FQXNuOMJcofn0xdRokA/mcuaKBHHNc/Ltm
HJO5KLSiOBGsvlgXwwPSdEcNwmShgbqgymMudPFWQKsNuG16M9SVVm4xKjQdFPf6
DPeYCBmvuDA9MEcO+4O/m07lWkWnNM/eOJCb/x7DAwUpvR+QuBkjqOPRwPMfdtRi
zoKS4p7a7F/xJp5PjqKFC1X3zhcmNob1Bha6Zf4X2zrWDTKGbqSgZYKeEBGGonp0
T67BGpIDvDSS7/WvXnpIzTd8JrEOUpF+j3TO0u/v7koq+djXGN6WazXAABuCmx8L
TjtVfPPHerLgWKZXJ51VGG0AObgmBUiOoepYl9TEOhq/s4f+AMGnqRGTCAtae/Q6
a+htyz/SJVHanNDl2U2AOXEiWqggT6SwFRqJXQFs1YIMWDslA77XlAaunXNlw/oR
SZE8I87Rkf3BQN9Mo7FH+xdrlj0BQ5rv6+Pp0GyacMmGuGYMIAI6fKnBB7ezWU6r
Nes+tCz+aD4wHn2V45uRGH4OSyAReriMUwtUuyKOQPiWj501DQzg6pYlS43munKo
VhznyZEuPhajOSP4BQHv0OqwJgnwyEyADrB1FTpu5ul3u07m50s=
=4t4K
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.19-rc1
Add more host1x devices on Tegra114 and Tegra124, as well as CSI for
Tegra20 and Tegra30. Support for the Xiaomi Mi Pad is also added.
* tag 'tegra-for-6.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add device-tree for Xiaomi Mi Pad (A0101)
ARM: tegra: add CSI nodes for Tegra20 and Tegra30
ARM: tegra: Add missing HOST1X device nodes on Tegra124
ARM: tegra: Add missing HOST1X device nodes on Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document various new IPs on older chips, as well as some existing
developer kits that were missing compatible strings. Add power domain
IDs on Tegra264 and wake-up support for the XUSB controller on Tegra234.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmkYOpMACgkQ3SOs138+
s6Egqg//bIex7+DYaxtSGkMepOJOlEKjcr981MWbkcsbgujBhIITZSBE9kQDUnQJ
QkjGiBeW5gHRZDmg2SFCKLoS0CKwCco0pGepXt9+jTkjOf33hcgIw1/pmIRus0HB
hF1x0qtA0J09mrsg3aF8z8qlJuhbSXfr+T3xrYYolzyO8i+8PPmnshu3PQv/WoTv
AiB3XF5WVGuAD9PY1/Dy5yHy6e+TogP3nZBe0Cvxs+xyAubNNF+KMcsEm4NcdIDM
USk/r58m99/gOyMbXZuxfkHwX1nKoEVT0SDqkoW+t9spb0rIiowGRAsvw00pOdN9
iMIJkivh1Eh74DTSoFRSmyYdsnwE52YceNpC9kgJ5k9AA8wB1Y3WPdh+Si+TgreG
cUuLuvLMAhqMhSty34QcOMgeohAxlb7nbLI9keug1DVilaDYQtq/H4k7T6UpqxO/
bEyyhAIE5qgWKMAWGB+g40q6OVfrd8wB2fOvU73GvB1MhUQzIfMae+hqEBJJHddq
fHKyOY80piwA6FFLYBS0hye0Fgs9qezkX4YevaObru/o+zwPNbnVtA9ZpRMV+2ng
DQ6n0c7YZTUOeWQmSJvqCzsBws95VpQJPef4rdK1NDJWWdEH+6/QDQzqI3ChxttY
jIniWsilxkqBntIBkzOW/5J0q/BiMI3FzBI6OrlEnYPv6ZUcP5U=
=QUDS
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgifYACgkQmmx57+YA
GNlZNhAAoPGm2JbTF8UgMs7IKWNS0fqONR7Que2Sc0nyOpXvTLWk6MwjTojybY/y
k7ZF4hqjOeiTHV9R/Qdr2UG+jUYUIN0JoAbzgKQPKotjIal9/5inBJ1YBq7cbIl4
JaPhI1w1s0YjTghUilBBzF090lVdK5OfXnnihMj3eMcpCm/e5EY1VJpPOhi6I7PM
WiWFe60f+LtlQNh/c8lj9xjkqCqTZRiQ+5n0JuL2gtY3HESu8OpwI8Fa5EnMQSHg
rTAEK32ukm4c+6/JzQIVEoA6dlpmogDXTsT09Qv1dw5JH0e+5RHMBN813me8X+ex
h+7k2awWXWqeDg5GML6arxuZfkPxJJSd6vuwe6EWC3YeP4/tfrAxTTogRhY7lIVR
excLy+AOWUgdbpN/4xuMGOczdIWVcP32Diutxo2KuwkyZeW6OhWrQACHif2jZcAG
hi8PaX2bo8xTSf9bHFNi+io+BkdfSP50vT7y8/UoyJ9+8SredI++ebRRtvjqNhfL
2D+9PE7Fk9wErpVIbUhbEQo1vCZsnSSmHWfUTS61jzraAG4Yb9R6gOwTJFpzg1dZ
R9UA6n9KaniBvNJLhb+r53x3UHTUiTFBe2xC9H241lKwM9OnqYNQvU3b3kjZA2k0
oqtk7Ajadpm+BIPE4tDJ7G9WMBzx8iUHT7w9Krc2QmU7VOCrejY=
=h8JE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.19-rc1
Document various new IPs on older chips, as well as some existing
developer kits that were missing compatible strings. Add power domain
IDs on Tegra264 and wake-up support for the XUSB controller on Tegra234.
* tag 'tegra-for-6.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller
dt-bindings: devfreq: tegra30-actmon: Add Tegra124 fallback for Tegra210
dt-bindings: display: tegra: Document Tegra20 and Tegra30 CSI
dt-bindings: display: tegra: document EPP, ISP, MPE and TSEC for Tegra114+
dt-bindings: arm: tegra: Document Jetson Nano Devkits
dt-bindings: power: Add power domain IDs for Tegra264
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add Imagination Technologies PowerVR Series 7XE GE7800 GPU support
for the R-Car M3-N and V3U SoCs,
- Add Ethernet support for the RZ/T2H and RZ/N2H SoCs and their
evaluation boards,
- Add ADC support for the RZ/N1D SoC,
- Add thermal, NMI pushbutton, and RTC support for the RZ/V2H SoC and
the RZ/V2H EVK development board,
- Add USB2.0 support for the RZ/G3S SoC and the RZ/G3S SMARC Carrier
II board.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaRcAkgAKCRCKwlD9ZEnx
cF89AP9Vkd0D3KNWvaGX8aKc7D0PQSPfhiE5YSLhmalIYd/HkwEAzEJTbBE6mOdB
HdSO2CdHQNRJ0ApFcEfwU4Pvr+dLYgA=
=lnh0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgiVwACgkQmmx57+YA
GNmc4Q/9ExdOkSXZFzD9AiAOFb/aQjhLg/GQrGucG01a8OiWDIvSy9r2nk+40JwS
Vs27cy1ondJ06YIj52pV1rnlfpOb6UUuLVJ3ClvNOFmfL+BRURnpyhV+kkBR+EI7
T4aMb9azwyIFYSiAjMna0sIG+0lvVVI8rHsF8uEILrcfbiIqMY8U3ra5Y4XJQZIL
liBFUfzXxL6nOMuq/UnXzrtHRYjSqrRKHA3HHBO+qMYibF4ha478/dqiSA3HJfKf
8c/jhbLCp0WXMpaGzA+sJxN5dajqxe69JAbuJly/ssGNlQQmpe9GQ1AEbHCayVor
BQcFTBQvQ8efhNvcuh4pE43uS4EY69YD5hRBKSH9TaYtJ8qwi4HXGuEcO78TklSk
hAkT22iQcBhz0tWn3tUgy1JaL+6siy+6gqj+Xt9xHlk1Is1BOCiKgQAvSDAIxoxY
Y52vejdOt9xyZCQEgBBPS1LkVq8ui6217IQRUZXAUcmF4qGEL1Jrvyk5VolR7f35
dU1slby7J27TNSxzoG0OD9gmPxeWkEJynZMXPgXRuHwQvLi+3HvVMXllna/kJUV3
Lgr+Jvl8WapDX8+l7REOSwUjKPZI4CNQOl+ChjgumhhFl9ryKx+wrkXS7m+fm0XP
dT8KYocDYIZ2B527hl5Ys7Q2JLE44kxCaJ3rYcHM+sk+HWGAWC0=
=Ioc1
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.19 (take two)
- Add Imagination Technologies PowerVR Series 7XE GE7800 GPU support
for the R-Car M3-N and V3U SoCs,
- Add Ethernet support for the RZ/T2H and RZ/N2H SoCs and their
evaluation boards,
- Add ADC support for the RZ/N1D SoC,
- Add thermal, NMI pushbutton, and RTC support for the RZ/V2H SoC and
the RZ/V2H EVK development board,
- Add USB2.0 support for the RZ/G3S SoC and the RZ/G3S SMARC Carrier
II board.
* tag 'renesas-dts-for-v6.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: rzt2h-n2h-evk: Enable Ethernet support
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add NMI pushbutton support
arm64: dts: renesas: rzg3s-smarc: Enable USB support
arm64: dts: renesas: r9a08g045: Add USB support
arm64: dts: renesas: r9a09g057: Add TSU nodes
ARM: dts: renesas: r9a06g032: Add the ADC device
arm64: dts: renesas: r9a09g087: Add GMAC nodes
arm64: dts: renesas: r9a09g077: Add GMAC nodes
arm64: dts: renesas: r9a09g087: Add ETHSS node
arm64: dts: renesas: r9a09g077: Add ETHSS node
arm64: dts: renesas: r8a779a0: Add GE7800 GPU node
arm64: dts: renesas: r8a77965: Add GE7800 GPU node
dt-bindings: clock: r8a779a0: Add ZG core clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- MT7988 BananaPi R4 Pro eMMC and SD router board with support
for both Key-M and Key-E M.2 slots through DTB Overlays
- MT8370 Grinn GenioSBC-510 (GenioSOM-510 + GenioBoard Edge AI)
- MT8390 Grinn GenioSBC-700 (GenioSOM-700 + GenioBoard Edge AI)
- New variant: MT8395 MediaTek Genio 1200 EVK with UFS
...preparation for new SoCs (MT8196 Kompanio Ultra, a clone of the
MT6991 Dimensity 9400, and MT6878 Dimensity 7300) with the
addition of GCE/PIO definitions
...improvements for already supported SoCs and machines:
- MT7622/7981b/7986a/7988a gain support for reading SoC UUID from
eFuse, used to generate a persistent MAC address on boards that
don't have any factory-assigned addresses.
- MT7986 BananaPi R3 gets changes to its default fan PWM speed to
improve compatibility with cheaper fans (usually coming with the
heatsink+fan combos)
- The MT7981b OpenWRT One router sees general support improvements
with the enablement of its UART-0 console and correct pinmuxing
for the same, addition of reserved memory for Trusted Firmware A,
its SPI NOR Flash (for recovery system, WiFi eeprom data and ETH
MAC address from factory), and board LEDs.
- MT8365 gets support for its Mali G52 MC1 GPU, which gets enabled
in the MediaTek Genio 350 EVK board
...and a dt-bindings warning fix for MT8183 machines through trivial
changes to rename the audiosys and afe nodes to reflect bindings.
-----BEGIN PGP SIGNATURE-----
iLoEABYKAGIWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaRMFRxsUgAAAAAAEAA5t
YW51MiwyLjUrMS4xMSwyLDIoHGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29s
bGFib3JhLmNvbQAKCRCaNgTPrZeEeIN8AP95ZFYLCHAQv8jYgBDlwfG6m6OPPFgo
5UlEzvGl5p6wfwD/Z53tiVKrOgmOTJzqCkcjeAq6SDzxwOuJmGE6rdXVlAo=
=7T95
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgh7kACgkQmmx57+YA
GNmJoQ//ZZJ3wO4WiZog2CemXlj7OOoS80OT20XVQ5oiexhLhmoR65/iwLdwaLmq
hXtQrQ91qzL+cMAyWfZus9whtBIXXiAc1Ul/Ma3MNZK8IkIAIC4Kr1hfYomnMBxV
MfPV31REqDC3AOi/xWw5Ahlo09lvJm00jKSRDYPwb29dmq6p4MI1KiAr7i5ybqO3
BiOm7Js5IEQkB8NW7UL+KA/sHbmvw5kWRyEtd5vCLZ6S/CsJl9fyclYZSGKX9o5h
60W7GQypHJaU+nxDlfgL0LEGavLH1bCxti8DB4nfVkCUWh1kMqN9hOLNPVt9j57G
ViXJRBmXPjCweDW+KONKeIKubk52jngniRF58CSqll+rHCF806SAiHVStzD+Weg/
dWkF8EmgCfxz1EuU3Xw7VKQvZti5+Dqr4jECamX1bHw7206oDqL2isN1v0oC2PbW
GlLx/QthPPDHT2EuQR0ZiR6QMPBsjPdP9KHf/2RE5qkONuWa5fyW0Ncww9D0psVS
z7jQGUf4FsWjCU8Kz4wmqmtURcoh86cuOUXbkYDMoje54Qgm1g0nXj7V9I3qVaCl
9T5IEKPCfcborMKycRC8+/+oFbk0ppYhzCrxfe+8N6gCz6S+HKW8u5l4rhb217X7
D6d9NWtKQBe8H7TtDLcWN1IOD/LiQPh8GMv5NXG8iYJfWujNTPk=
=gbIc
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts64-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 Device Tree updates
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- MT7988 BananaPi R4 Pro eMMC and SD router board with support
for both Key-M and Key-E M.2 slots through DTB Overlays
- MT8370 Grinn GenioSBC-510 (GenioSOM-510 + GenioBoard Edge AI)
- MT8390 Grinn GenioSBC-700 (GenioSOM-700 + GenioBoard Edge AI)
- New variant: MT8395 MediaTek Genio 1200 EVK with UFS
...preparation for new SoCs (MT8196 Kompanio Ultra, a clone of the
MT6991 Dimensity 9400, and MT6878 Dimensity 7300) with the
addition of GCE/PIO definitions
...improvements for already supported SoCs and machines:
- MT7622/7981b/7986a/7988a gain support for reading SoC UUID from
eFuse, used to generate a persistent MAC address on boards that
don't have any factory-assigned addresses.
- MT7986 BananaPi R3 gets changes to its default fan PWM speed to
improve compatibility with cheaper fans (usually coming with the
heatsink+fan combos)
- The MT7981b OpenWRT One router sees general support improvements
with the enablement of its UART-0 console and correct pinmuxing
for the same, addition of reserved memory for Trusted Firmware A,
its SPI NOR Flash (for recovery system, WiFi eeprom data and ETH
MAC address from factory), and board LEDs.
- MT8365 gets support for its Mali G52 MC1 GPU, which gets enabled
in the MediaTek Genio 350 EVK board
...and a dt-bindings warning fix for MT8183 machines through trivial
changes to rename the audiosys and afe nodes to reflect bindings.
* tag 'mtk-dts64-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (27 commits)
arm64: dts: mediatek: mt7981b-openwrt-one: Enable software leds
arm64: dts: mediatek: mt7981b-openwrt-one: Enable SPI NOR
arm64: dts: mediatek: mt7988a-bpi-r4pro: Add mmc overlays
arm64: dts: mediatek: mt7988a-bpi-r4-pro: Add PCIe overlays
arm64: dts: mediatek: mt7988: Add devicetree for BananaPi R4 Pro
arm64: dts: mediatek: mt7988: Disable 2.5G phy and enable at board layer
dt-bindings: arm: mediatek: add BPI-R4 Pro board
arm64: dts: mediatek: Add GCE header for MT8196
arm64: dts: mediatek: mt7981b: Add reserved memory for TF-A
arm64: dts: mediatek: mt7981b: Configure UART0 pinmux
arm64: dts: mediatek: mt8365-evk: Enable GPU support
arm64: dts: mediatek: mt8365: Add GPU support
arm64: dts: mediatek: mt8395-genio-1200-evk: Describe CPU supplies
arm64: dts: mediatek: Add MT6878 pinmux macro header file
arm64: dts: mediatek: mt7986-bpi-r3: Change fan PWM value for mid speed
arm64: dts: mediatek: mt8370-grinn-genio-510-sbc: Add Grinn GenioSBC-510
arm64: dts: mediatek: mt8390-genio-700-evk: Add Grinn GenioSBC-700
arm64: dts: mediatek: mt7988a: add 'soc-uuid' cell to efuse
arm64: dts: mediatek: mt7981b: add 'soc-uuid' cell to efuse
arm64: dts: mediatek: mt7986a: add 'soc-uuid' cell to efuse
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This performs a cleanup of the MT6582 devicetrees and adds support
for secondary cores bringup on this SoC.
This also introduces basic support for a new machine, the MT6582
Alcatel "yarisxl" Pop C7 (OT-7041D) smartphone, with support for
booting into a initramfs with UART console output.
-----BEGIN PGP SIGNATURE-----
iLoEABYKAGIWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaRL92hsUgAAAAAAEAA5t
YW51MiwyLjUrMS4xMSwyLDIoHGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29s
bGFib3JhLmNvbQAKCRCaNgTPrZeEeAI/AQCBTyBT0oOvHrQm/ce2V3PKg4a5z0H6
jgItAPcKz0z5+wD+NJmQrcO7oxSLiBBYTQibAbp8EYjKR/r5kHOui0zy3gw=
=Acch
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgh4AACgkQmmx57+YA
GNnniQ/9HqHCyHB7IxwYvqGqPIAnz+eGrVJqYLGB8KN8xq/B6BbLssO4B7GA/TbL
oTHVLiaBNeuDj9qNXol0fcffPLhmqXcMO/3fgDpoKPzlEjix/LNfKcFiqzOwivRG
h//ZlgL4J8Q72LlwUjmjkdAhxn3jwUD5kogqTfYCwsUEgVZDsA2qvAFZYmoMbSg/
2Pn3IikaBxXtBmYKjjlvkBx52aL/E0V3sysQsP9S1RimGwOsVH7C1ZeW05XnsP+u
wVtfrFyj+F6y8yxZT12jcwgTSAvhIBdFXDRe0Yav9t6guEKTOgQThZVMk19d2Px2
rmIohfzPFuiXsxZ6bBL5HMU2Vmzv7q1/chXd6tgx7SB9YRWl80Yne5r7d4WuO+m8
bcvxVI8SlVilKgZhf0c4ClJh05lMkvzOTRXY3rHUmmj6icP07a4PNPWPINXPAB10
VmHA6Rfacf/TKxRwSg+I/9PNF6aPjLvpBLfTNcP9FdK07FqGiEVPNa17c3VaksMG
qVfNw+rzB3I7A55ztmOPOMYvOqPaWL/W0nJucXTdah0JVP86I8lrUXYPTYqmvFNF
yF9PgNB3wiMj6htvFSQATQwMQca0eyXlXQ1nVkdygUdBNI83oLPXiUzUxJcVm+3R
+aIYSDE/UG4EVxH5FLvQ3wgAlQtNRMyF9yRpfCq1kKeYS+luhZQ=
=KJzU
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts32-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM32 Device Tree updates
This performs a cleanup of the MT6582 devicetrees and adds support
for secondary cores bringup on this SoC.
This also introduces basic support for a new machine, the MT6582
Alcatel "yarisxl" Pop C7 (OT-7041D) smartphone, with support for
booting into a initramfs with UART console output.
* tag 'mtk-dts32-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
ARM: dts: mediatek: drop wrong syscon hifsys compatible for MT2701/7623
ARM: dts: mediatek: add basic support for Alcatel yarisxl board
dt-bindings: arm: mediatek: Add MT6582 yarisxl
ARM: dts: mediatek: mt6582: add enable-method property to cpus
ARM: dts: mediatek: mt6582: add clock-names property to uart nodes
ARM: dts: mediatek: mt6582: add mt6582 compatible to timer
ARM: dts: mediatek: mt6582: remove compatible property from root node
ARM: dts: mediatek: mt6582: sort nodes and properties
ARM: dts: mediatek: mt6582: move MMIO devices under soc node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add PWM controlled fan and it's associated thermal management for the
Lichee Pi 4A board.
Enable additional ISA extenstions supported by the T-Head C910 cores:
Zfh, Ziccrse, XTheadvector.
Add reset controllers of more TH1520 subsystems: AP, AO, DSP, MISC, VI.
Signed-off-by: Drew Fustini <fustini@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaRDChQAKCRDb7CzD2Six
DNU3AQDMrJ6jcRJQbog1T2OnIxPyvOct1Hx+01cD62MaSFprHAEAsJ4L8s3HPMWf
pj+Cq44DoFH6UV/ImJlxpYFL87J9TQY=
=ykgv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghukACgkQmmx57+YA
GNmV9A/9GUE328GSrWiJ63RsZmgnBhb0o2SRyQxQSmTWbaLnNeHebO0myNCUynK9
kqacDnOFyUyFu8J7bMqT5RtZTGZalvFtt7Uxld+ESjTxujBqCZz7QNEVvWzNUpzB
pxIfJdWfm7GcQYZsM+6V+tpByVkrnh3smErm3vCt4TFCk9Eqkn0n+Vfe8Rvm3Tm9
ELZY/zC4LW4GMDX429wJs1d9N9c6zxYwhd/Q1kyO5iPV/eiLlTVVFlHQZZaJRlB0
TbAHVt5RxtN4AC2xLUAer3J1K4iZNnXvVbBb5kBnGny5FTxHSafB11V2BFwDKrDB
eleUw8K6xXL5Jijau5rULF4e35Qo8SXRI6FaiezcZbFzqC/ChSzsSY6phGEd2REt
Z/lXrpa4YhiFPNyJzRLCDeFp9vRHgMOwBng7eZWx2AOMhGGNOUp1ktgj4n2lsRf1
9AxII/D+Dfdvrl1aicTRxpKEknywJw1x4RPcM9jTQfbEh22inp4f2fdwjNtK85vp
uvStggBXvACHSz8pM7g1iifLsrOoXIuN7/BRrnw7yBUTz6rtCLAwsIpqr2H7qPTA
ke+4EcxLNZWhii8pMG/q/bsOdDoaylVHfDkA/hai0tUpseGDm7Sf1LutFIi6i7CO
aYSIIXFIFSx8JFbgqncmDwXoZwFGc/y4npDcd5NTUR8eNygX9ME=
=wIpW
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt
T-HEAD Devicetrees for v6.19
Add PWM controlled fan and it's associated thermal management for the
Lichee Pi 4A board.
Enable additional ISA extenstions supported by the T-Head C910 cores:
Zfh, Ziccrse, XTheadvector.
Add reset controllers of more TH1520 subsystems: AP, AO, DSP, MISC, VI.
Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'thead-dt-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
riscv: dts: thead: Add reset controllers of more subsystems for TH1520
riscv: dts: thead: Add PWM fan and thermal control
riscv: dts: thead: Add PWM controller node
riscv: dts: thead: add zfh for th1520
riscv: dts: thead: add ziccrse for th1520
riscv: dts: thead: add xtheadvector to the th1520 devicetree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add thermal support for the RZ/G3S and RZ/G3E SoCs,
- Add DT overlay support for the Raspberry Pi Display 2 and Argon40
fan hats on the Retronix Sparrow Hawk board,
- Add eMMC support for the Eagle Function expansion board,
- Add initial support for the R-Car X5H (R8A78000) SoC and the
Ironhide development board,
- Move interrupt-parent properties to root nodes,
- Add system watchdog timer support for R-Car Gen3 and Gen4 SoCs,
which is reserved for secure firmware on R-Car Gen3 boards,
- Add ADC support for the RZ/T2H and RZ/N2H SoCs and their evaluation
boards,
- Add watchdog timer support on the R-Car V3M Starter Kit board,
- Add Cortex-A55 PMU support on the RZ/V2H, RZ/V2N, RZ/T2H, and RZ/N2H
SoCs,
- Add Imagination Technologies PowerVR Series 6XT GX6250 GPU support
on the R-Car M3-W and M3-W+ SoCs,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaQSHowAKCRCKwlD9ZEnx
cJSMAP0ejaSo8LMqtL1rSMrPWz07J/H3xNQDsEgbWHdybNCp2wD/XQhBQpmtnIJb
dk1rw+nNHXowyGN6VfQ7FV57J1KKaAc=
=wcHD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgheMACgkQmmx57+YA
GNnXNg//Scu2l2KUmZiiGFLL3NLVRVQM4hvr/bRxcYLboUtyQTvQtRdkCm41EU0Y
GK7ObO+Bj+Oy9+q4jmfQ4MkWj48CNABkPVNxRk+1yJt27bZ2xkcktP6oPldsdJOM
pTOHibLdG5r9W4KyACQjhNXqFkYrUzbHbNToWU0XEaHLGBw+5Ix+9Fh92oKrvfEe
qXCyU4KDFQHxBnjmvySJq0HDMY5f677EXuq7IkWRQmHkmF6vazW3k2F3rZjoXHsV
PQlS3frcMLMVHx+rq+sc4BWMj9YRKMFAUaVuurjdCGrvFf6clyKNcXZ992rV0oX5
LSuOmncdYY5mCLB04RPsHWxWln2wt1T7rwDSqGNknb4ZJUsfodDgstGocKm7XfPm
WzIl7SVc3KaJRpNbTNwtDceyloN6Dpycp0mcbLCYpBGSELa/oJWc36crST4TvcCE
zqmIHw9Y5tFqKTIV14CwlpYuVDJ1YLDVUc5Ij3HCsuB0GUHgeYSr2vQTGPc3mHjC
mbrMw5uy5Vy0jgaNkvyUuW0BaiSpDTZNB9KJrO9awR4KOGMUmrqJeg3RK6zAYcjz
8qRkSPZ7hYz8Av6wWSdqWj4KgQLbQK82Qk3xfU1o2F4C89ZLCIYBG5+VONW+odoG
CTNL9YGau9+AU/s5QK8K8UgR0vr0GxVFZMQ+/gJ3kdQjggx+p7c=
=0Lcz
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.19
- Add thermal support for the RZ/G3S and RZ/G3E SoCs,
- Add DT overlay support for the Raspberry Pi Display 2 and Argon40
fan hats on the Retronix Sparrow Hawk board,
- Add eMMC support for the Eagle Function expansion board,
- Add initial support for the R-Car X5H (R8A78000) SoC and the
Ironhide development board,
- Move interrupt-parent properties to root nodes,
- Add system watchdog timer support for R-Car Gen3 and Gen4 SoCs,
which is reserved for secure firmware on R-Car Gen3 boards,
- Add ADC support for the RZ/T2H and RZ/N2H SoCs and their evaluation
boards,
- Add watchdog timer support on the R-Car V3M Starter Kit board,
- Add Cortex-A55 PMU support on the RZ/V2H, RZ/V2N, RZ/T2H, and RZ/N2H
SoCs,
- Add Imagination Technologies PowerVR Series 6XT GX6250 GPU support
on the R-Car M3-W and M3-W+ SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (80 commits)
arm64: dts: renesas: sparrow-hawk: Fix full-size DP connector node name and labels
arm64: dts: renesas: r8a77961: Add GX6250 GPU node
arm64: dts: renesas: r8a77960: Add GX6250 GPU node
ARM: dts: renesas: kzm9g: Name interrupts for accelerometer
arm64: dts: renesas: r9a09g087: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g077: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g056: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g057: Add Cortex-A55 PMU node
ARM: dts: renesas: r9a06g032-rzn1d400-db: Drop invalid #cells properties
arm64: dts: renesas: v3msk: Enable watchdog timer
arm64: dts: renesas: r8a779h0: Add SWDT node
arm64: dts: renesas: r8a779g0: Add SWDT node
arm64: dts: renesas: r8a779f0: Add SWDT node
arm64: dts: renesas: r8a779a0: Add SWDT node
arm64: dts: renesas: rzt2h/rzn2h-evk: Enable ADCs
arm64: dts: renesas: r9a09g087: Add ADCs support
arm64: dts: renesas: r9a09g077: Add ADCs support
ARM: dts: renesas: koelsch: Update ADV7180 binding
ARM: dts: renesas: r9a06g032: Move interrupt-parent to root node
ARM: dts: renesas: r8a7794: Move interrupt-parent to root node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Significant changes:
- The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems
New platforms:
- IBM Balcones
The Balcones system is similar to Bonnell but with a POWER11 processor.
Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI
tree is needed.
- Meta Yosemite5
The Yosemite5 platform provides monitoring of voltages, power,
temperatures, and other critical parameters across the motherboard,
CXL board, E1.S expansion board, and NIC components.
Updated platforms:
- clemente (Meta): LEDs, shunt resistor configuration
- santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs
There are a scattering of one-off changes and devicetree cleanups for other
platforms as well.
-----BEGIN PGP SIGNATURE-----
iJIEABYKADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaQPvIxwcYW5kcmV3QGNv
ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmWf4A/0xN2+KOIfqkVSut5IP2
Y54gRoSR9xhEeoaOq1xHrvJpAQCqo6V5j1dmx21qTDhFbxGxU4KH6SUBhVpIMNYj
vGZhCA==
=e3/X
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghTsACgkQmmx57+YA
GNka7Q/7BVAkUmHTXMfxP+VWDYzqhV5G4LjrdaW01heQC3j1mTv4qL5KGQTrrEQU
gC2tZ/rpIpOvc1PdTubh/B1sMdRPb/c0+NVpYTbfjrEMSFSLWLxyNOVhFD3fBxMz
8jj1YS4o8Z0KmgHQNuhy6+nPUiez8aPyYBWk6r6ZsgB4kmGyThRAhUB75wwgd8gl
DDINQe/mPlOKY3YwIniS7pT53z7fyKfXXOVvTWGYQOB79ykUpNdppK1POVsywueT
+2g0juDD/SELCf4TP7eq/JKts4SDMlePlt5pKqIchRdzAucaNnl1220T31Y2aHEd
rj1Nyf8Ad0uGsLwizGnvoremtfhCo0yOlVPotB1nbR/spadNU8IcX61RNd6eS98B
VWrZBTsUSKcrxgE/+gDDGipSOpR5b0dmH+ignJuhWH8uiDwfT1urYUIB8Nnuueeh
udkPraSM+yQr0HfajQrJPeIIQaxP/7VnQr5yNfFIQk3aD5TR92cFFviI8lsJybVt
uhKb9vd4mdeE0V1EIrWjSWX757Zcvbo8xWULYdLdex21JJ2adYXu7DHO8vntGckC
/EzF+z1wCjHKNOYnNAV7rqD6LT8IKb4lbxS6GWSupI4aicoLZsrQhp0FlS7H+KLg
NYz6ClQJstwC58B+lEU6wEE3SU+P3Bp9UU7N9Zzhih9zayrRiN0=
=8yf0
-----END PGP SIGNATURE-----
Merge tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
First batch of ASPEED Arm devicetree changes for 6.19
Significant changes:
- The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems
New platforms:
- IBM Balcones
The Balcones system is similar to Bonnell but with a POWER11 processor.
Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI
tree is needed.
- Meta Yosemite5
The Yosemite5 platform provides monitoring of voltages, power,
temperatures, and other critical parameters across the motherboard,
CXL board, E1.S expansion board, and NIC components.
Updated platforms:
- clemente (Meta): LEDs, shunt resistor configuration
- santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs
There are a scattering of one-off changes and devicetree cleanups for other
platforms as well.
* tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
ARM: dts: aspeed: santabarbara: Add AMD APML interface support
ARM: dts: aspeed: santabarbara: Add gpio line name
ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
ARM: dts: aspeed: santabarbara: Add sensor support for extension boards
ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability
ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC
dt-bindings: arm: aspeed: add Meta Yosemite5 board
ARM: dts: aspeed: clemente: Add HDD LED GPIO
ARM: dts: aspeed: Fix max31785 fan properties
ARM: dts: aspeed: Add Balcones system
dt-bindings: arm: aspeed: add IBM Bonnell board
dt-bindings: arm: aspeed: add IBM Balcones board
ARM: dts: aspeed: harma: Add MCTP I2C controller node
ARM: dts: aspeed: yosemite4: allocate ramoops for kernel panic
ARM: dts: aspeed: clemente: add shunt-resistor-micro-ohms for LM5066i
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rollup of hardware support which has accumulated since support for the
SoC and coreprimevelte board was merged. This most notably includes
eMMC, PMIC, backlight and touchscreen. A few QoL fixes are also
included.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQRt/0HWDfMUtbdrpjCtMZNSRY+tAwUCaOz5IwAKCRCtMZNSRY+t
A/JXAPsGp+81P4vgINVTfceFPqbcqd1gnFk/ZCqBJjvdGvR73AD/R6Se5lwtSIq6
sfcm47LpbZ+Bv/9UbZMA7D0il67tcwY=
=NjpT
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghKoACgkQmmx57+YA
GNkBIg//WKaHWlNKGJAMmjnNSkorAoTpEyEETppiLZIXqsxYuS5zfbYXO7bMDKao
o2yioNyLtD4ZEcjgw+cx4v0gkbdwmAfNwKLuSBsRsg1MbxgxNjAbgF8QKyMp6/Iu
nEFbHi8zf/Ypb9Su5G4pteHVJQNJe1glU0DiV7Oi/x/g1y7va3tjQgys6LnPQ1Z4
V5dshWcbklcODFMDkFkmJ12d6iXV7AYFhkjtaemqq+F1j4M92rBRAlOHIWuhB5Wh
BH5dZG0c8AGg0394smwOe9LjqN0jVWu+/GeWr3fs8GS2nSQS1rhZfewkR5YAl7nL
K1MzuvzwXQ9r1A113Yu7LyzBkIl2K795L/AKDOHMtfLZHaqG4LVUVwSbCqwZsUvt
mThZq6v0bbs4YdMLN+RrTCH/Z9vhe+5I/kG0JXiUcvQbDyBAw50aGBQBG5uAuzrT
Gyvs8Fl7cqzpjIWfKHZdc/5HRNlufFHzyykPmoBhfZAfpTShfJ4917KAaTctzNSf
GCZzYPMHO1E/Y1d3hyRGUsHGD8JaPzl4Ki75EnKvSexs5rGBYLBeJCDONuV9Dkp0
9scvpWo8Sr7LlzBhYpOkJERxMcRY5L7K5CZKkYABFENvdw3mOKctaVEtdNE4Uhe+
C6ga3GP8vC/iytnFRl7Xnf/1HYgK9xyz80UhzvVNysMW7Fc8NFE=
=n+0B
-----END PGP SIGNATURE-----
Merge tag 'pxa1908-dt-for-6.19' of https://gitlab.com/pxa1908-mainline/linux into soc/dt
PXA1908 DT changes for 6.19
Rollup of hardware support which has accumulated since support for the
SoC and coreprimevelte board was merged. This most notably includes
eMMC, PMIC, backlight and touchscreen. A few QoL fixes are also
included.
* tag 'pxa1908-dt-for-6.19' of https://gitlab.com/pxa1908-mainline/linux:
arm64: dts: marvell: pxa1908: Add power domains
arm64: dts: marvell: samsung,coreprimevelte: Add USB connector
arm64: dts: marvell: samsung,coreprimevelte: Fill in memory node
arm64: dts: marvell: samsung,coreprimevelte: Drop some reserved memory
arm64: dts: marvell: pxa1908: Move ramoops to SoC dtsi
arm64: dts: marvell: samsung,coreprimevelte: Add vibrator
arm64: dts: marvell: pxa1908: Add PWMs
arm64: dts: marvell: samsung,coreprimevelte: Enable eMMC
arm64: dts: marvell: samsung,coreprimevelte: Correct CD GPIO
arm64: dts: marvell: samsung,coreprimevelte: Add backlight
arm64: dts: samsung,coreprimevelte: add SDIO
arm64: dts: samsung,coreprimevelte: add touchscreen
arm64: dts: samsung,coreprimevelte: add PMIC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The P3509 carrier board does not connect the ID GPIO. Prior to this, the
GPIO role switch driver could not detect the mode of the OTG port.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The USB Micro-B port on p3450 is capable of OTG and doesn't need to be
hardcoded to peripheral. No other supported Tegra device is set up like
this, so align for consistency.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra X1 chip contains a NVJPG accelerator capable of
encoding/decoding JPEG files in hardware. Complete its DT node
and enable it.
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the NVJPG power-domain node in order to support the NVJPG
accelerator in Tegra210 platforms.
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add interrupts for Tegra234 USB wake events to support the USB wake-up
function.
Signed-off-by: Haotien Hsu <haotienh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra210 L4T bootloader RAM training will corrupt the in-RAM kernel
DT if no reserved-memory node exists. This prevents said bootloader from
being able to boot a kernel without this node, unless a chainloaded
bootloader loads the DT. Add the node to eliminate the requirement for
extra boot stages.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra210 L4T bootloader RAM training will corrupt the in-RAM kernel
DT if no reserved-memory node exists. This prevents said bootloader from
being able to boot a kernel without this node, unless a chainloaded
bootloader loads the DT. Add the node to eliminate the requirement for
extra boot stages.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The other engines are already enabled, finish filling out the media
engine nodes and power domains.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The APB DMA controller node is currently named "dma@60020000", but
according to the DT bindings the node name should be "dma-controller".
Update the node name to match the binding and fix dtbs_check warnings.
Signed-off-by: Nino Zhang <ninozhang001@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
tegra210.dtsi:31.3-41: Warning (interrupt_map): /pcie@1003000:interrupt-map:
Missing property '#address-cells' in node /interrupt-controller@50041000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
tegra194.dtsi:2391.4-42: Warning (interrupt_map): /bus@0/pcie@14100000:interrupt-map:
Missing property '#address-cells' in node /bus@0/interrupt-controller@3881000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
tegra186.dtsi:1355.3-41: Warning (interrupt_map): /pcie@10003000:interrupt-map:
Missing property '#address-cells' in node /interrupt-controller@3881000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
tegra132.dtsi:32.3-41: Warning (interrupt_map): /pcie@1003000:interrupt-map:
Missing property '#address-cells' in node /interrupt-controller@50041000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds OPP tables for ACTMON and EMC, enabling dynamic frequency
scaling for system memory.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe the
hardware interconnection.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This enables the action monitor to facilitate dynamic frequency scaling.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Populate USB wake events for Tegra234 XUSB host controller.
These wake-up events are optional to maintain backward compatibility and
because the USB controller does not require them for normal operation.
Signed-off-by: Haotien Hsu <haotienh@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra210 actmon is compatible with the existing Tegra124 driver.
Describe the compatibles as such.
Acked-by: Chanwoo Choi <cw00c.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB
of internal memory that can be supplemented with a microSDXC card giving
up to 128 GB of additional storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Clock and reset names are not needed if node contains only one clock and
one reset.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
HDA is part of the DISP_USB bus, so move it into that and drop the
address prefix accordingly.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Document CSI HW block found in Tegra20 and Tegra30 SoC.
The #nvidia,mipi-calibrate-cells is not an introduction of property, such
property already exists in nvidia,tegra114-mipi.yaml and is used in
multiple device trees. In case of Tegra30 and Tegra20 CSI block combines
mipi calibration function and CSI function, in Tegra114+ mipi calibration
got a dedicated hardware block which is already supported. This property
here is used to align with mipi-calibration logic used by Tegra114+.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The current EPP, ISP and MPE schemas are largely compatible with Tegra114+,
requiring only minor adjustments. Additionally, the TSEC schema for the
Security engine, which is available from Tegra114 onwards, is included.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable Ethernet support on the RZ/T2H and RZ/N2H EVKs.
Configure the MIIC converter in mode 0x6:
Port 0 <-> ETHSW Port 0
Port 1 <-> ETHSW Port 1
Port 2 <-> GMAC2
Port 3 <-> GMAC1
Enable the ETHSS, GMAC1 and GMAC2 nodes. ETHSW support will be added
once the switch driver is available.
Configure the MIIC converters to map ports according to the selected
switching mode, with converters 0 and 1 mapped to switch ports and
converters 2 and 3 mapped to GMAC ports.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251110203926.692242-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
RZ/V2H EVK has a user pushbutton connected to the SoC NMI pin, which
can be used to wake up the system from suspend to idle. Add a DT node
in the device tree to instantiate the gpio-keys driver for this button.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251027140651.18367-1-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add USB nodes for the Renesas RZ/G3S SoC. This consists of PHY reset,
host and device support.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20251023135810.1688415-7-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The Renesas RZ/V2H SoC includes a Thermal Sensor Unit (TSU) block designed
to measure the junction temperature. The device provides real-time
temperature measurements for thermal management, utilizing two dedicated
channels for temperature sensing:
- TSU0, which is located near the DRP-AI block
- TSU1, which is located near the CPU and DRP-AI block
Since TSU1 is physically closer the CPU and the highest temperature
spot, it is used for CPU throttling through a passive trip and cooling
map. TSU0 is configured only with a critical trip.
Add TSU nodes along with thermal zones and keep them enabled in the SoC
DTSI.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251020143107.13974-4-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
SpacemiT K1 SoC is equipped with a total of nine I2C controllers,
ranging from I2C0 to I2C8.
Prior to this change, only I2C2 and I2C8 were explicitly defined
within the device tree. This patch comprehensively adds the
device tree node definitions for I2C controller 0, 1, 4 to 7.
The I2C3 node is not added because it belongs exclusively to the
secure domain which not used in the linux realm.
All newly added I2C nodes are set to "disabled" status by default,
allowing future board-specific device tree to enable and configure.
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20251105-k1-add-i2c-node-v1-2-d18dae246137@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reorder the i2c2 node to its correct position according to its
register address.This improves the readability and maintainability
of the device tree file by adhering to the established ordering convention.
No functional change is introduced by this reordering.
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20251105-k1-add-i2c-node-v1-1-d18dae246137@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>