Commit graph

1,309,163 commits

Author SHA1 Message Date
Takashi Sakamoto
27310d5616 firewire: core: use guard macro to maintain properties of fw_card
The core functions uses spinlock in instance of fw_card structure to
protect concurrent access to properties in the instance.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-15-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:05 +09:00
Takashi Sakamoto
d320bac904 firewire: core: use guard macro to maintain list of asynchronous transaction
The core function maintains pending asynchronous transactions by list in
the instance of fw_card. The concurrent access to the list is protected
by spinlock in the instance.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-14-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:04 +09:00
Takashi Sakamoto
b9545448f0 firewire: core: use guard macro to maintain list of receivers for phy configuration packets
The core function maintains clients to receive phy configuration packets
by list in the instance of fw_card. The concurrent access to the list is
protected by spinlock in the instance.

This commit uses guard macro to maintain the list.

Link: https://lore.kernel.org/r/20240805085408.251763-13-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:03 +09:00
Takashi Sakamoto
cf123b0128 firewire: core: use guard macro to maintain isochronous context for userspace client
The core function allows one isochronous contexts per userspace client.
The concurrent access to the context is protected by spinlock in the
instance of client.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-12-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:02 +09:00
Takashi Sakamoto
d3816b8b98 firewire: core: use guard macro to maintain IDR of isochronous resources for userspace clients
The core function provides UAPI to maintain isochronous resources allocated
by userspace clients across bus resets automatically. The resources are
maintained by IDR and the concurrent access to it is protected by spinlock
in the instance of client.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-11-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:01 +09:00
Takashi Sakamoto
4f1f91aeca firewire: core: use guard macro to maintain list of events for userspace clients
The core function maintains events to userspace by list in the instance of
client. The concurrent access to the list is protected by spinlock in
the instance.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-10-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:54:00 +09:00
Takashi Sakamoto
bacf921c42 firewire: core: use guard macro to disable local IRQ
The core function provides an operation for userspace application to
retrieve current value of CYCLE_TIMER register with several types of
system time. In the operation, local interrupt is disables so that the
access of the register and ktime are done atomically.

This commit uses guard macro to disable/enable local interrupts.

Link: https://lore.kernel.org/r/20240805085408.251763-9-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:59 +09:00
Takashi Sakamoto
3a335229c5 firewire: core: use guard macro to maintain the list of address handler for transaction
The core function maintains address handlers by list. It is protected by
spinlock to insert and remove entry to the list.

This commit uses guard macro to maintain the spinlock.

Link: https://lore.kernel.org/r/20240805085408.251763-8-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:58 +09:00
Takashi Sakamoto
2a6a58f06b firewire: core: use guard macro to access to IDR for fw_device
The core function maintains the instance of fw_device structure by IDR.
The concurrent access to IDR is protected by static read/write semaphore.
The semaphore is also utilized to protect concurrent access to the
content of configuration ROM cached to the instance so that the cache is
swapped to the latest one.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-7-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:57 +09:00
Takashi Sakamoto
eade1e1ba2 firewire: core: use guard macro to maintain RCU scope for transaction address handler
The core function maintains address handlers by list. RCU is utilized
for efficient read access to any entries in the list.

This commit uses guard macro to maintain RCU locking and releasing.

Link: https://lore.kernel.org/r/20240805085408.251763-6-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:56 +09:00
Takashi Sakamoto
6d72fbc816 firewire: ohci: use guard macro to serialize accesses to phy registers
The 1394 OHCI driver protects concurrent accesses to phy registers by
mutex object in fw_ohci structure.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-5-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:55 +09:00
Takashi Sakamoto
044ce581ab firewire: core: use guard macro to maintain the list of cdev clients
The core function maintains userspace clients by the list in fw_device
object associated to the operated character device. The concurrent
access to the list is protected by mutex in the object.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-4-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:54 +09:00
Takashi Sakamoto
57b40ec6db firewire: core: use guard macro to maintain the list of card
The core function maintains registered cards by list. The concurrent
access to the list is protected by static mutex.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-3-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:53 +09:00
Takashi Sakamoto
232f72b10d firewire: core: use guard macro to maintain static packet data for phy configuration
The core function provide a kernel API to send phy configuration packet.
Current implementation of the feature uses packet object allocated
statically. The concurrent access to the object is protected by static
mutex.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-2-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-05 17:53:52 +09:00
Dave Airlie
a4172af304 drm-xe-next for 6.12
UAPI Changes:
 - Rename xe perf layer as xe observation layer, but was
   also made available via fixes to previous verison (Ashutosh)
 - Use write-back caching mode for system memory on DGFX,
   but was also mad available via fixes to previous version (Thomas)
 - Expose SIMD16 EU mask in topology query for userspace to know
   the type of EU, as available in PVC, Lunar Lake and Battlemage
   (Lucas)
 - Return ENOBUFS instead of ENOMEM in vm_bind if failure is tied
   to an array of binds (Matthew Brost)
 
 Driver Changes:
 - Log cleanup moving messages to debug priority (Michal Wajdeczko)
 - Add timeout to fences to adhere to dma_buf rules (Matthew Brost)
 - Rename old engine nomenclature to exec_queue (Matthew Brost)
 - Convert multiple bind ops to 1 job (Matthew Brost)
 - Add error injection for vm bind to help testing error path
   (Matthew Brost)
 - Fix error handling in page table to propagate correctly
   to userspace (Matthew Brost)
 - Re-organize and cleanup SR-IOV related registers (Michal Wajdeczko)
 - Make the device write barrier compatible with VF (Michal Wajdeczko)
 - New display workarounds for Battlemage (Matthew  Auld)
 - New media workarounds for Lunar Lake and Battlemage (Ngai-Mint Kwan)
 - New graphics workarounds for Lunar Lake (Bommu Krishnaiah)
 - Tracepoint updates (Matthew Brost, Nirmoy Das)
 - Cleanup the header generation for OOB workarounds (Lucas De Marchi)
 - Fix leaking HDCP-related object (Nirmoy Das)
 - Serialize L2 flushes to avoid races (Tejas Upadhyay)
 - Log pid and comm on job timeout (José Roberto de Souza)
 - Simplify boilerplate code for live kunit (Michal Wajdeczko)
 - Improve kunit skips for live kunit (Michal Wajdeczko)
 - Fix xe_sync cleanup when handling xe_exec ioctl (Ashutosh Dixit)
 - Limit fair VF LMEM provisioning (Michal Wajdeczko)
 - New workaround to fence mmio writes in Lunar Lake (Tejas Upadhyay)
 - Warn on writes inaccessible register in VF (Michal Wajdeczko)
 - Fix register lookup in VF (Michal Wajdeczko)
 - Add GSC support for Battlemage (Alexander Usyskin)
 - Fix wedging only the GT in which timeout occurred (Matthew Brost)
 - Block device suspend when wedging (Matthew Brost)
 - Handle compression and migration changes for Battlemage
   (Akshata Jahagirdar)
 - Limit access of stolen memory for Lunar Lake (Uma Shankar)
 - Fail invalid addresses during user fence creation (Matthew Brost)
 - Refcount xe_file to safely and accurately store fdinfo stats
   (Umesh Nerlige Ramappa)
 - Cleanup and fix PM reference for TLB invalidation code
   (Matthew Brost)
 - Fix PM reference handling when communicating with GuC (Matthew Brost)
 - Add new BO flag for 2 MiB alignement and use in VF (Michal Wajdeczko)
 - Simplify MMIO setup for multi-tile platforms (Lucas De Marchi)
 - Add check for uninitialized access to OOB workarounds
   (Lucas De Marchi)
 - New GSC and HuC firmware blobs for Lunar Lake and Battlemage
   (Daniele Ceraolo Spurio)
 - Unify mmio wait logic (Gustavo Sousa)
 - Fix off-by-one when processing RTP rules (Lucas De Marchi)
 - Future-proof migrate logic with compressed PAT flag (Matt Roper)
 - Add WA kunit tests for Battlemage (Lucas De Marchi)
 - Test active tracking for workaorunds with kunit (Lucas De Marchi)
 - Add kunit tests for RTP with no actions (Lucas De Marchi)
 - Unify parse of OR rules in RTP (Lucas De Marchi)
 - Add performance tuning for Battlemage (Sai Teja Pottumuttu)
 - Make bit masks unsigned (Geert Uytterhoeven)
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE6rM8lpABPHM5FqyDm6KlpjDL6lMFAmapZ/oZHGx1Y2FzLmRl
 bWFyY2hpQGludGVsLmNvbQAKCRCboqWmMMvqU2PGD/9FeVWIsFDIcWGvALxiQj4m
 s8ASWygbKf5/3zFs43tsfdVj96y4BTf4bs2my/EIe4cnBks3/+tvF64HUBsWGJAW
 naII15Ha41X+rAyxPP6FqRIk1TgauPa0V8rpS92FGvsLz/9f++Zd++UhzSQ/Hu2Z
 6kVgWGmaPpSMzo2aNinahD0ABW5M3H9kSvdgOok4bxzMzoxLo7aqamsFv/Eh714z
 wtxkGSqZu0sDqF5qVuyoHLcKK1ljJNs/tYaCAwvN9z9lY/u/nkhAZq/+wEnPJ6BD
 34Ammb/TFzvkpD4zwdT3/ouIVFEzlCAOXsOJ3wBECg46Z2RrVWlKGsoKgjtEwu1T
 TGGW0fuBxtthDW48/5X7FkXg2COdLGInyE7nUlgy5xEzuWmlZhyxbmdNuiM1n878
 16XB/018bvmFX/PMJtWaiOpukJO6DHU/+QgME7E3G+rYzzH00EsvDpk/fH+OPoCX
 kC/vsUzf03v8Akmq8tpBg9IQ/aPgCCIjTHrbObidUooLEUW0sEiwOgHU2cHN5x60
 0njuQQuHoOEJq5FR4VTcYW0c8D51MHKykeFv+QYinwTAK9jqhFcWjKQOt0m6MfJl
 gP8cWzxSyI2IIX+7+gy4fvaP5u4ZcAyahJikzhm5Ucse093MT1La6orT2PtmS5KB
 kscopKXzBerbsctok1FLgA==
 =xmxR
 -----END PGP SIGNATURE-----

Merge tag 'drm-xe-next-2024-07-30' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

drm-xe-next for 6.12

UAPI Changes:
- Rename xe perf layer as xe observation layer, but was
  also made available via fixes to previous verison (Ashutosh)
- Use write-back caching mode for system memory on DGFX,
  but was also mad available via fixes to previous version (Thomas)
- Expose SIMD16 EU mask in topology query for userspace to know
  the type of EU, as available in PVC, Lunar Lake and Battlemage
  (Lucas)
- Return ENOBUFS instead of ENOMEM in vm_bind if failure is tied
  to an array of binds (Matthew Brost)

Driver Changes:
- Log cleanup moving messages to debug priority (Michal Wajdeczko)
- Add timeout to fences to adhere to dma_buf rules (Matthew Brost)
- Rename old engine nomenclature to exec_queue (Matthew Brost)
- Convert multiple bind ops to 1 job (Matthew Brost)
- Add error injection for vm bind to help testing error path
  (Matthew Brost)
- Fix error handling in page table to propagate correctly
  to userspace (Matthew Brost)
- Re-organize and cleanup SR-IOV related registers (Michal Wajdeczko)
- Make the device write barrier compatible with VF (Michal Wajdeczko)
- New display workarounds for Battlemage (Matthew  Auld)
- New media workarounds for Lunar Lake and Battlemage (Ngai-Mint Kwan)
- New graphics workarounds for Lunar Lake (Bommu Krishnaiah)
- Tracepoint updates (Matthew Brost, Nirmoy Das)
- Cleanup the header generation for OOB workarounds (Lucas De Marchi)
- Fix leaking HDCP-related object (Nirmoy Das)
- Serialize L2 flushes to avoid races (Tejas Upadhyay)
- Log pid and comm on job timeout (José Roberto de Souza)
- Simplify boilerplate code for live kunit (Michal Wajdeczko)
- Improve kunit skips for live kunit (Michal Wajdeczko)
- Fix xe_sync cleanup when handling xe_exec ioctl (Ashutosh Dixit)
- Limit fair VF LMEM provisioning (Michal Wajdeczko)
- New workaround to fence mmio writes in Lunar Lake (Tejas Upadhyay)
- Warn on writes inaccessible register in VF (Michal Wajdeczko)
- Fix register lookup in VF (Michal Wajdeczko)
- Add GSC support for Battlemage (Alexander Usyskin)
- Fix wedging only the GT in which timeout occurred (Matthew Brost)
- Block device suspend when wedging (Matthew Brost)
- Handle compression and migration changes for Battlemage
  (Akshata Jahagirdar)
- Limit access of stolen memory for Lunar Lake (Uma Shankar)
- Fail invalid addresses during user fence creation (Matthew Brost)
- Refcount xe_file to safely and accurately store fdinfo stats
  (Umesh Nerlige Ramappa)
- Cleanup and fix PM reference for TLB invalidation code
  (Matthew Brost)
- Fix PM reference handling when communicating with GuC (Matthew Brost)
- Add new BO flag for 2 MiB alignement and use in VF (Michal Wajdeczko)
- Simplify MMIO setup for multi-tile platforms (Lucas De Marchi)
- Add check for uninitialized access to OOB workarounds
  (Lucas De Marchi)
- New GSC and HuC firmware blobs for Lunar Lake and Battlemage
  (Daniele Ceraolo Spurio)
- Unify mmio wait logic (Gustavo Sousa)
- Fix off-by-one when processing RTP rules (Lucas De Marchi)
- Future-proof migrate logic with compressed PAT flag (Matt Roper)
- Add WA kunit tests for Battlemage (Lucas De Marchi)
- Test active tracking for workaorunds with kunit (Lucas De Marchi)
- Add kunit tests for RTP with no actions (Lucas De Marchi)
- Unify parse of OR rules in RTP (Lucas De Marchi)
- Add performance tuning for Battlemage (Sai Teja Pottumuttu)
- Make bit masks unsigned (Geert Uytterhoeven)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/k7xuktfav4zmtxxjr77glu2hszypvzgmzghoumh757nqfnk7kn@ccfi4ts3ytbk
2024-08-05 18:47:43 +10:00
Krzysztof Kozlowski
203ed203fc arm64: dts: layerscape: fix thermal node names length
Linux kernel expects thermal zone node names to be maximum of 19
characters (see THERMAL_NAME_LENGTH, including terminating NUL byte) and
bindings/dtbs_check points that:

  fsl-ls2088a-rdb.dtb: thermal-zones: 'core-cluster1-thermal', 'core-cluster2-thermal', 'core-cluster3-thermal', 'core-cluster4-thermal'
    do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$', 'pinctrl-[0-9]+'

Name longer than 19 characters leads to driver probe errors when
registering such thermal zone.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:19:57 +08:00
Andrei Stefanescu
0274d80982 pinctrl: s32cc: add update and overwrite options when setting pinconf
The previous pinconf settings(made by the bootloader) need to be
overwritten when configuring the pinctrl of a driver during the boot
process.

Configuring the bias of a GPIO at runtime (e.g. pull-up) needs to
preserve the other settings unaltered.

This patch introduces changes to differentiate between the two cases.

Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com>
Signed-off-by: Florin Buica <florin.buica@nxp.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Link: https://lore.kernel.org/20240723131832.1171036-4-andrei.stefanescu@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 10:17:43 +02:00
Andrei Stefanescu
522875e09b pinctrl: s32cc: configure PIN_CONFIG_DRIVE_PUSH_PULL
Previously, it was possible to only configure the open-drain for a pin.
However, after a pin got configured with open-drain, there wasn't any
way to disable it. Add the push-pull configuration in order to reverse
the open-drain configuration.

Signed-off-by: Florin Buica <florin.buica@nxp.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Link: https://lore.kernel.org/20240723131832.1171036-3-andrei.stefanescu@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 10:17:43 +02:00
Andrei Stefanescu
846d9b8628 pinctrl: s32cc: enable the input buffer for a GPIO
The IBE (input buffer enable) should be enabled for a GPIO. Reading the
value will return the one from the input register, writing the value
will return the one from the output register.

This offers the flexibility to check if the value intended to be set
matches the actual physical one.

Signed-off-by: Florin Buica <florin.buica@nxp.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Link: https://lore.kernel.org/20240723131832.1171036-2-andrei.stefanescu@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 10:17:43 +02:00
Fabio Estevam
f384d2828f arm64: dts: imx8mm-venice-gw72xx-0x: Remove compatible from dtso
There is no need to describe the compatible string inside
a dtso file.

dt-schema produces super verbose warnings about that.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Parthiban Nallathambi <parthiban@linumiz.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:09:53 +08:00
Fabio Estevam
c716fb7eff arm64: dts: imx8mm-phygate-tauri-l: Remove compatible from dtso
There is no need to describe the compatible string inside
a dtso file.

dt-schema produces super verbose warnings about that.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:09:52 +08:00
Frank Li
7500e5b370 arm64: dts: imx95-19x19-evk: add pwm fan control
Add pwm fan and overwrite default thermal nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:10 +08:00
Frank Li
3d282d5cc8 arm64: dts: imx95: add thermal_zone label
Add thermal_zone label because it may be overwrite by board level dts file.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:10 +08:00
Frank Li
cb68151272 arm64: dts: imx95-19x19-evk: add flexspi and child node
Add flexspi and child flash node.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:09 +08:00
Frank Li
a748b411d6 arm64: dts: imx95: add flexspi node
Add flexspi support.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:09 +08:00
Frank Li
288c31c92f arm64: dts: imx95-19x19-evk: Add audio related nodes
Add sai1, sai2. Add i2c4 and wm8962 and other dependent nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:09 +08:00
Frank Li
70fd1f6641 arm64: dts: imx95: add sai[1..6], xcvr and micfill
Add sai[1..6], NXP Audio Transceiver (XCVR) Controller and  MICFIL Digital
Audio Interface (MICFIL).

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:09 +08:00
Frank Li
915fd2e127 arm64: dts: imx95: add edma[1..3] nodes
Add eDMA1, eDMA2 and eDMA3 support for iMX95.
Add dmas and dma-names for each peripheral, which use eDMA.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 16:07:08 +08:00
Stefan Binding
312c04cee4 ALSA: hda: cs35l41: Stop creating ALSA Controls for firmware coefficients
When the CS35L41 loads its firmware, it has a number of controls to
affect its behaviour. Currently, these controls are exposed as ALSA
Controls.

These controls were never intended to be exposed to users but the
firmware doesn't mark them hidden, so make the driver ignore them.

Any changes in the coefficients handled by these controls needs to
be matched to the individual system by SSID, which is already handled
using the tuning file, when firmware is loaded, so UCM should not be
setting these controls anyway.

Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
Link: https://patch.msgid.link/20240801155047.456540-1-sbinding@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-05 09:49:37 +02:00
Simon Trimmer
34e1b1bb73 ALSA: hda: cs35l56: Stop creating ALSA controls for firmware coefficients
A number of laptops have gone to market with old firmware versions that
export controls that have since been hidden, but we can't just install a
newer firmware because the firmware for each product is customized and
qualified by the OEM. The issue is that alsactl save and restore has no
idea what controls are good to persist which can lead to
misconfiguration.

There is no reason that the UCM or user should need to interact with any
of the ALSA controls for the firmware coefficients so they can be
removed entirely, this also simplifies the driver.

Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com>
Link: https://patch.msgid.link/20240801143139.34549-1-simont@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-05 09:49:03 +02:00
Hans Verkuil
812765cd69 media: vivid: add <Vendor Command With ID> support
This makes it possible to test the new CEC_MSG_FL_REPLY_VENDOR_ID flag.

The vivid driver will Feature Abort any messages that do not have
exactly 1 payload byte. It ignores messages where the payload byte is
even, and where it is odd it will reply with the payload byte incremented
by 1. Basically a simple ping-pong command.

Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2024-08-05 09:39:19 +02:00
Hans Verkuil
613f21505b media: cec: core: add new CEC_MSG_FL_REPLY_VENDOR_ID flag
If this flag is set, then the reply is expected to consist of
the CEC_MSG_VENDOR_COMMAND_WITH_ID opcode followed by the Vendor ID (as
used in bytes 1-4 of the message), followed by the struct cec_msg reply
field.

Note that this assumes that the byte after the Vendor ID is a
vendor-specific opcode.

This flag makes it easier to wait for replies to vendor commands,
using the same CEC framework support for waiting for regular replies.

Support for this flag is indicated by setting the new
CEC_CAP_REPLY_VENDOR_ID capability.

Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2024-08-05 09:38:46 +02:00
Tomer Maimon
1441195709 pinctrl: nuvoton: npcm8xx: modify pins flags
Modify the following pins flags on the Nuvoton NPCM8XX BMC:
- Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag
- Add pins 229 and 230 GPO flag.
- Remove pin 233 SLEWLPC flag.
- Remove pin 251 SLEW flag.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:35 +02:00
Tomer Maimon
db5edf0f5c pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC
SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:35 +02:00
Tomer Maimon
d66fad91c9 pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group
Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
4edcebbb43 pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36
This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton
NPCM8xx BMC SoC.

The pins are configured for only for input.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
92f5f86b06 pinctrl: nuvoton: npcm8xx: clear polarity before set both edge
Clear polarity before setting both edges to ensure that the polarity is
in the same state before configuring events for both edges

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
20070bdc1c pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functions
Remove non-existent smb4den abd lpcclk pins, groups and functions on
the Nuvoton NPCM8XX BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Tomer Maimon
5555901464 dt-bindings: pinctrl: npcm8xx: remove non-existent groups and functions
Remove non-existent smb4den and lpcclk groups and functions from Nuvoton
NPCM8XX Pin controller binding documentation.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20240716194008.3502068-2-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:32:34 +02:00
Peng Fan
d59c2396e0 pinctrl: samsung: Use scope based of_node_put() cleanups
Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20240504-pinctrl-cleanup-v2-20-26c5f2dc1181@nxp.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-05 09:30:15 +02:00
Konrad Dybcio
b7fd103337 pinctrl: qcom: x1e80100: Update PDC hwirq map
The current map seems to be out of sync (and includes a duplicate entry
for GPIO193..).

Replace it with the map present in shipping devices' ACPI tables.

This new one seems more complete, as it e.g. contains GPIO145 (PCIE6a
WAKE#)

Fixes: 05e4941d97 ("pinctrl: qcom: Add X1E80100 pinctrl driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Link: https://lore.kernel.org/20240711-topic-x1e_pdc_tlmm-v1-1-e278b249d793@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:29:59 +02:00
Fabio Estevam
9c26327ee7 ARM: mach-imx: imx6sx: Remove Ethernet refclock setting
The Ethernet refclock configuration is board specific and should
not be harcoded in machine code.

Remove it to align with the imx6ul commit e87f3be1c7 ("ARM: mach-imx:
imx6ul: remove not optional ethernet refclock overwrite").

Clearing bits 13 and 17 of GPR1 is the POR values, so this change
does not affect existing boards in mainline.

Tested on imx6sx-udoo-neo and imx6sx-sdb boards.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 15:26:30 +08:00
Rayyan Ansari
d3f891f1d1 dt-bindings: pinctrl: qcom,apq8084-pinctrl: convert to dtschema
Convert the Qualcomm APQ8084 TLMM block bindings from text to yaml dt
schema format.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20240709162009.5166-5-rayyan.ansari@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:25:45 +02:00
Rayyan Ansari
06881e91f3 dt-bindings: pinctrl: qcom,ipq4019-pinctrl: convert to dtschema
Convert the Qualcomm IPQ4019 TLMM block bindings from text to yaml dt
schema format.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20240709162009.5166-4-rayyan.ansari@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:25:45 +02:00
Rayyan Ansari
df1acfd0a5 dt-bindings: pinctrl: qcom,ipq8064-pinctrl: convert to dtschema
Convert the Qualcomm IPQ8064 TLMM block bindings from text to yaml dt
schema format.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20240709162009.5166-3-rayyan.ansari@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:25:45 +02:00
Rayyan Ansari
31ed8634a2 dt-bindings: pinctrl: qcom,apq8064-pinctrl: convert to dtschema
Convert the Qualcomm APQ8064 TLMM block bindings from text to yaml dt
schema format.

Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20240709162009.5166-2-rayyan.ansari@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:25:45 +02:00
Christophe JAILLET
3479c7ae9c pinctrl: ti: ti-iodelay: Constify struct ti_iodelay_reg_data
'struct ti_iodelay_reg_data' is not modified in this driver.

Constifying this structure moves some data to a read-only section, so
increase overall security.

On a x86_64, with allmodconfig:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  17259	   1788	     16	  19063	   4a77	drivers/pinctrl/ti/pinctrl-ti-iodelay.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  17355	   1692	     16	  19063	   4a77	drivers/pinctrl/ti/pinctrl-ti-iodelay.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/40d6e67ab4e73d2cbe7ca0060ac27afc894fc415.1720556038.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:22:33 +02:00
Christophe JAILLET
a9f2b249ad pinctrl: ti: ti-iodelay: Fix some error handling paths
In the probe, if an error occurs after the ti_iodelay_pinconf_init_dev()
call, it is likely that ti_iodelay_pinconf_deinit_dev() should be called,
as already done in the remove function.

Also in ti_iodelay_pinconf_init_dev(), if an error occurs after the first
regmap_update_bits() call, it is also likely that the deinit() function
should be called.

The easier way to fix it is to add a devm_add_action_or_reset() at the
rigtht place to have ti_iodelay_pinconf_deinit_dev() called when needed.

Doing so, the .remove() function can be removed, and the associated
platform_set_drvdata() call in the probe as well.

Fixes: 003910ebc8 ("pinctrl: Introduce TI IOdelay configuration driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/0220fa5b925bd08e361be8206a5438f6229deaac.1720556038.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:22:26 +02:00
Fabio Estevam
52f82ed6a6 ARM: dts: imx6sx-udoo-neo: Properly configure ENET_REF
By default, the ENET_REF is configured at 125MHz on i.MX6SX, which works
well for boards that operate in RGMII mode.

The imx6sx-udoo-neo has a KSZ8091 Ethernet PHY that is connected via
RMII interface, so a 50MHz ENET_REF clock is expected.

Describe the IMX6SX_CLK_ENET_REF accordingly.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05 15:11:33 +08:00
Javier Carrasco
bebf833d33 pinctrl: realtek: Constify struct regmap_config
`rtd_pinctrl_regmap_config` is not modified and can be declared as const
to move its data to a read-only section.

Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com>
Link: https://lore.kernel.org/20240704-pinctrl-const-regmap_config-v1-2-9d5570f0b9f3@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05 09:07:41 +02:00