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Author SHA1 Message Date
Arnd Bergmann
fcc3e3c3a4 STM32 DT updates for v5.11, round 1
Highlights:
 ----------
 
 MCU part:
  -Fix dmamux reg property (length) on stm32h743.
  -Explicitly set DCMI bus type on stm32429i eval board.
 
 MPU part:
  -Enable FIFO mode with half-full threshold for DCMI.
  -Harmonize EHCI/OHCI nodes.
  -Move SDMMC IP version to v2.0 to get features improvements.
  -Add LP-timer wakeup support.
  -Enable crypto/hash/crc support.
  -Explicitly set DCMI bus type on stm32mp157 eval board.
  -Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
   (It is connected to I2C4).
  -Fix dmamux reg property (length) on stm32mp151.
  -Optimize USB OTG FIFO sizes on stm32mp151.
  -Declare tamp node also as "simple-mfd".
 
  -LXA:
   -Document Octavo vendor-prefixes yaml file.
   -Document lxa,stm32mp157c-mc1 in STM32 yaml file.
 
  -DH:
   -Connect PHY IRQ line on DH SoM.
   -Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
   -Document all DH compatible strings in STM32 yaml file.
   -Add DHCOM based PicoITX board. This board embedds ethernet port,
    USB, CAN LEDS and a custom board-to-board connector.
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Merge tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.11, round 1

Highlights:
----------

MCU part:
 -Fix dmamux reg property (length) on stm32h743.
 -Explicitly set DCMI bus type on stm32429i eval board.

MPU part:
 -Enable FIFO mode with half-full threshold for DCMI.
 -Harmonize EHCI/OHCI nodes.
 -Move SDMMC IP version to v2.0 to get features improvements.
 -Add LP-timer wakeup support.
 -Enable crypto/hash/crc support.
 -Explicitly set DCMI bus type on stm32mp157 eval board.
 -Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
  (It is connected to I2C4).
 -Fix dmamux reg property (length) on stm32mp151.
 -Optimize USB OTG FIFO sizes on stm32mp151.
 -Declare tamp node also as "simple-mfd".

 -LXA:
  -Document Octavo vendor-prefixes yaml file.
  -Document lxa,stm32mp157c-mc1 in STM32 yaml file.

 -DH:
  -Connect PHY IRQ line on DH SoM.
  -Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
  -Document all DH compatible strings in STM32 yaml file.
  -Add DHCOM based PicoITX board. This board embedds ethernet port,
   USB, CAN LEDS and a custom board-to-board connector.

* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
  ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
  dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
  dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
  ARM: dts: stm32: Add DHCOM based PicoITX board
  dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
  ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
  dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
  ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
  ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
  ARM: dts: stm32: fix dmamux reg property on stm32h743
  ARM: dts: stm32: fix dmamux reg property on stm32mp151
  ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
  ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
  dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
  dt-bindings: connector: add typec-power-opmode property to usb-connector
  ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
  ARM: dts: stm32: enable CRYP by default on stm32mp15
  ARM: dts: stm32: enable CRC1 by default on stm32mp15
  ...

Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:00:08 +01:00
Arnd Bergmann
3a53840627 Devicetree changes for omaps for v5.11 merge window
- Two non-urgent pandaboard updates to get gpio button and bluetooth
   working on pandaboard-es
 
 - Updates to follow devicetree binding docs for dwc3 and pwm-leds
 
 - Add initial support for droid bionic based on what we have for droid4
 
 - Add second sha instance for dra7
 
 - Add eQEP nodes for am335x for boneblue
 
 - Fix wrong comments for am335x gpio_31
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Merge tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.11 merge window

- Two non-urgent pandaboard updates to get gpio button and bluetooth
  working on pandaboard-es

- Updates to follow devicetree binding docs for dwc3 and pwm-leds

- Add initial support for droid bionic based on what we have for droid4

- Add second sha instance for dra7

- Add eQEP nodes for am335x for boneblue

- Fix wrong comments for am335x gpio_31

* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
  ARM: dts: am335x-boneblue: Enable eQEP
  ARM: dts: am33xx: Add nodes for eQEP
  ARM: dts: dra7: add second SHA instance
  ARM: dts: xt875: add section for kionix kxtf9
  ARM: dts: mapphone: separate out xt894 specific things
  ARM: dts: omap: Fix schema warnings for pwm-leds
  ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
  ARM: dts: am437x: Correct DWC USB3 compatible string
  ARM: dts: pandaboard es: add bluetooth uart for HCI
  ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES

Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 17:58:28 +01:00
Arnd Bergmann
2df8aa0373 ARM64: DT: Hisilicon ARM64 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
   have any functional effect except passing dtschema checks or dtc W=2 builds.
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Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2 builds.

* tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
  arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
  arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
  arm64: dts: hisilicon: list all clocks required by pl011.yaml
  arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
  arm64: dts: hisilicon: normalize the node name of the UART devices
  arm64: dts: hisilicon: normalize the node name of the usb devices
  arm64: dts: hisilicon: normalize the node name of the SMMU devices
  arm64: dts: hisilicon: place clock-names "biu" before "ciu"
  arm64: dts: hisilicon: remove unused property pinctrl-names
  arm64: dts: hisilicon: write the values of property-units into a uint32 array
  arm64: dts: hisilicon: separate each group of data in the property "reg"
  arm64: dts: hisilicon: normalize the node name of the ITS devices

Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:11:52 +01:00
Arnd Bergmann
3319f1489e ARM: DT: Hisilicon ARM32 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema including
   serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
   have any functional effect except passing dtschema checks or dtc W=2
   builds.
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Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM: DT: Hisilicon ARM32 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema including
  serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2
  builds.

* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: fix errors detected by syscon.yaml
  ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
  ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
  ARM: dts: hisilicon: fix errors detected by root-node.yaml
  ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
  ARM: dts: hisilicon: fix errors detected by usb yaml
  ARM: dts: hisilicon: fix errors detected by pl011.yaml
  ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml

Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:09:36 +01:00
Ahmad Fatoum
6660e24455 ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
acf6f33163 dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU,
RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP
compatible is contained as well. This allows boot firmware to match
against it to apply fixups if necessary.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
a24bde12f9 dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
Octavo Systems is an American company specializing in design and
manufacturing of System-in-Package devices.

The prefix is already in use for the Octavo Systems OSD3358-SM-RED
device tree, but was so far undocumented. Fix this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Marek Vasut
ac68793f49 ARM: dts: stm32: Add DHCOM based PicoITX board
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Marek Vasut
242639c0dc dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
Document devicetree compatible strings of the DH SoMs and boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
b19d3a55d4 ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].

The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.

[0]: 2e9bfc29dd

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
82765d1495 dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
The stm32mp1 TAMP (Tamper and backup registers) does tamper detection
and features 32 backup registers that, being in the RTC domain, may
survive even with Vdd switched off.

This makes it suitable for use to communicate a reboot mode from OS
to bootloader via the syscon-reboot-mode binding. Add a "simple-mfd"
to support probing such a child node. The actual reboot mode
node could then be defined in a board.dts or fixed up by the bootloader.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Arnaud Pouliquen
4c903a9464 ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.

Associated driver implementation is available in commit 9276536f45
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
d27209f04d ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
7e4bc946db ARM: dts: stm32: fix dmamux reg property on stm32h743
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
e3b37ca311 ARM: dts: stm32: fix dmamux reg property on stm32mp151
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
fc082d2bb2 ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
Update mdma1 clients channel priority level following stm32-mdma bindings.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
83686162c0 ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
This patch adds support for STUSB1600 USB Type-C port controller, used on
I2C4 on stm32mp15xx-dkx.
The default configuration on this board, on Type-C connector, is:
- Dual Power Role (DRP), so set power-role to "dual";
- Vbus limited to 500mA, so set typec-power-opmode to "default" (it means
  500mA in USB 2.0).
typec-power-opmode is used to reconfigure the STUSB1600 advertising of
current capability when its NVM is not in line with the board layout.
On stm32mp15xx-dkx, Vbus power source of STUSB1600 is 5V_VIN. So power
operation mode depends on the power supply used. To avoid any power
issues, it is better to limit Vbus to 500mA on this board.
ALERT# is the interrupt pin of STUSB1600. It needs an external pull-up, and
signal is active low.

USB OTG controller ID and Vbus signals are not connected on stm32mp15xx-dkx
boards, so disconnection are not detected.
Without DWC2 usb-role-switch:
- if you unplug the USB cable from the Type-C port, you have to manually
disconnect the USB gadget:
echo disconnect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect
- Then you can plug the USB cable again in the Type-C port, and manually
reconnect the USB gadget:
echo connect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect
With DWC2 usb-role-switch, USB gadget is dynamically disconnected or connected.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
70966729b5 dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
Add binding documentation for the STMicroelectronics STUSB160x Type-C port
controller.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
8e568db602 dt-bindings: connector: add typec-power-opmode property to usb-connector
Power operation mode may depends on hardware design, so, add the optional
property typec-power-opmode for usb-c connector to select the power
operation mode capability.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Patrick Delaunay
dc37a51b25 ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
Move spi4 at the right alphabetical place within stm32mp15-pinctrl

Fixes: 4fe663890a ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Hugues Fruchet
096b0243fa ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Hugues Fruchet
07e3454493 ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Lionel Debieve
b6aa35c739 ARM: dts: stm32: enable CRYP by default on stm32mp15
Enable CRYP1 device for cryp accelerated support on
stm32mp157C-EV1/DK2 STMicroelectronics platforms.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Nicolas Toromanoff
ee0035b233 ARM: dts: stm32: enable CRC1 by default on stm32mp15
Enable CRC1 device for CRC-32 accelerated support on
stm32mp15 STMicroelectronics platforms.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Lionel Debieve
304b5691bf ARM: dts: stm32: enable HASH by default on stm32mp15
Enable HASH1 device for HASH accelerated support on
stm32mp15 STMicroelectronics platforms.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Fabrice Gasnier
928caf877d ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151
LP timer can be used to wakeup from stop mode on stm32mp151.
Add wakeup-source properties to all LP timer instances.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Fabrice Gasnier
f885fbca0f ARM: dts: stm32: Add LP timer irqs on stm32mp151
Add all LP timer irqs on stm32mp151.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Yann Gautier
08f07e9a19 ARM: dts: stm32: update sdmmc IP version for STM32MP15
Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.

The mmci driver supports the v2.0 periph id since 7a2a98be67 ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Serge Semin
4f551b7bba ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Jisheng Zhang
25df3e1f64 arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
This is to remove similar errors as below:

OF: /.../gpio-port@0: could not find phandle

Commit 7569486d79 ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Serge Semin
4dc5288f5a arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
c4cbd0356c arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
The snps,dw-apb-uart binding need to specify two clocks: "baudclk",
"apb_pclk". But only "apb_pclk" is specified now. Because the driver
preferentially matches the first clock. Otherwise, it matches the second
clock instead of both clocks. So both of them use the same clock don't
change the function.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
58dd4736b8 arm64: dts: hisilicon: list all clocks required by pl011.yaml
The arm,pl011 binding need to specify two clocks: "uartclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
c85731abd6 arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
bf69b8622b arm64: dts: hisilicon: normalize the node name of the UART devices
Change the node name of the UART devices to match
"^serial(@[0-9a-f,]+)*$".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
4d2b9b98e3 arm64: dts: hisilicon: normalize the node name of the usb devices
Change the node name of the usb devices to match "^usb(@.*)?". These errors
are detected by generic-ehci.yaml and generic-ohci.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:18 +08:00
Zhen Lei
d7d45d5d11 arm64: dts: hisilicon: normalize the node name of the SMMU devices
Change the node name of the SMMU devices to match "^iommu@[0-9a-f]*".
Otherwise, the errors similar to the following will be reported by
arm,smmu-v3.yaml.

smmu_pcie: $nodename:0: 'smmu_pcie' does not match '^iommu@[0-9a-f]*'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
ee6ff04f7f arm64: dts: hisilicon: place clock-names "biu" before "ciu"
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
  clock-names:
    items:
      - const: biu
      - const: ciu

The "biu" needs to be placed before the "ciu".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
60780744d9 arm64: dts: hisilicon: remove unused property pinctrl-names
uart1 and uart5 are not used as pinctrl, so the property "pinctrl-names"
can be deleted. In fact, the property "pinctrl-names" depends on the
property "pinctrl-0". So the errors similar to the following will be
reported by pinctrl-consumer.yaml.

serial@fdf00000: 'pinctrl-0' is a dependency of 'pinctrl-names'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
8c563f55ee arm64: dts: hisilicon: write the values of property-units into a uint32 array
Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.

ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
24402ce1e2 arm64: dts: hisilicon: separate each group of data in the property "reg"
Do not write the "reg" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported by reg.yaml.

soc: dsa@c7000000:reg:0: [0, 3305111552, 0, 8978432, 0, 3338665984, 0, \
6291456] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
c25b846425 arm64: dts: hisilicon: normalize the node name of the ITS devices
Change the node name of the ITS devices to match
"^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although
"interrupt-controller" is allowed, but "msi-controller" is preferred.
Otherwise, "interrupt-controller@b7000000: False schema does not allow"
will be reported by arm,gic-v3.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 20:06:17 +08:00
Zhen Lei
d48b6ef74a ARM: dts: hisilicon: fix errors detected by syscon.yaml
The DT binding for system controller is not allowed to contain only the
compatible string "syscon", the Hisilicon peripheral subsystem controller
should add compatible string "hisilicon,peri-subctrl". Otherwise, the
error "compatible: ['syscon'] is too short" will be reported.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
4c246408f0 ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same
   clock.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
05484c171d ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
  clock-names:
    items:
      - const: biu
      - const: ciu

The "biu" needs to be placed before the "ciu".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
e0b09c35ae ARM: dts: hisilicon: fix errors detected by root-node.yaml
Make the memory node name match the regex "^memory(@[0-9a-f]+)?$" which
is described in memory.yaml. Otherwise, it will be treated as root node,
and misreported by root-node.yaml.

Errors misreported by root-node.yaml:
/: memory: False schema does not allow {'device_type': ['memory'], 'reg':

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
8e9e8dd7ce ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
Change bus node name from "amba" to "amba-bus" to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
64f5b52554 ARM: dts: hisilicon: fix errors detected by usb yaml
1. Change node name to match '^usb(@.*)?'

These errors are detected by generic-ehci.yaml and generic-ohci.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
e5e225fd49 ARM: dts: hisilicon: fix errors detected by pl011.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same
   clock.
3. Change pinctrl-names to "default", "sleep".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00
Zhen Lei
30ea026e33 ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same
   clock.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24 19:43:18 +08:00